PIC18F23K20-E/MLQTP MICROCHIP [Microchip Technology], PIC18F23K20-E/MLQTP Datasheet - Page 29
PIC18F23K20-E/MLQTP
Manufacturer Part Number
PIC18F23K20-E/MLQTP
Description
28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F23K20-EMLQTP.pdf
(420 pages)
- Current page: 29 of 420
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REGISTER 2-1:
© 2007 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-4
bit 3
bit 2
bit 1-0
Note 1:
R/W-0
IDLEN
2:
3:
Reset state depends on state of the IESO Configuration bit.
Source selected by the INTSRC bit of the OSCTUNE register, see text.
Default output frequency of HFINTOSC on Reset.
IDLEN: Idle Enable bit
1 = Device enters Idle mode on SLEEP instruction
0 = Device enters Sleep mode on SLEEP instruction
IRCF<2:0>: Internal Oscillator Frequency Select bits
111 = 16 MHz (HFINTOSC drives clock directly)
110 = 8 MHz
101 = 4 MHz
100 = 2 MHz
011 = 1 MHz
010 = 500 kHz
001 = 250 kHz
000 = 31 kHz (from either HFINTOSC/512 or LFINTOSC directly)
OSTS: Oscillator Start-up Time-out Status bit
1 = Device is running from the clock defined by FOSC<2:0> of the CONFIG1 register
0 = Device is running from the internal oscillator (HFINTOSC or LFINTOSC)
IOFS: HFINTOSC Frequency Stable bit
1 = HFINTOSC frequency is stable
0 = HFINTOSC frequency is not stable
SCS<1:0>: System Clock Select bits
1x = Internal oscillator block
01 = Secondary (Timer1) oscillator
00 = Primary clock (determined by CONFIG1H[FOSC<3:0>]).
R/W-0
IRCF2
OSCCON: OSCILLATOR CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
(3)
IRCF1
R/W-1
Advance Information
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
IRCF0
R/W-1
(1)
OSTS
PIC18F2XK20/4XK20
R-q
(1)
IOFS
R-0
(2)
q = depends on condition
x = Bit is unknown
R/W-0
SCS1
DS41303B-page 27
R/W-0
SCS0
bit 0
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