PIC18F23K20-E/MLQTP MICROCHIP [Microchip Technology], PIC18F23K20-E/MLQTP Datasheet - Page 161

• Manufacturer Part Number: PIC18F23K20-E/MLQTP
• Description: 28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

15.4
The PWM mode generates a Pulse-Width Modulated
signal on the CCP2 pin for the CCP module and the
P1A through P1D pins for the ECCP module. Hereafter
the modulated output pin will be referred to as the CCPx
pin. The duty cycle, period and resolution are
determined by the following registers:
• PR2
• T2CON
• CCPR
• CCPxCON
In Pulse-Width Modulation (PWM) mode, the CCP
module produces up to a 10-bit resolution PWM output
on the CCPx pin. Since the CCPx pin is multiplexed
with the PORT data latch, the TRIS for that pin must be
cleared to enable the CCPx pin output driver.
Figure 15-3 shows a simplified block diagram of PWM
operation.
Figure 15-4 shows a typical waveform of the PWM
signal.
For a step-by-step procedure on how to set up the CCP
module for PWM operation, see Section 15.4.7
“Setup for PWM Operation”.
FIGURE 15-3:
© 2007 Microchip Technology Inc.
Note 1:
Note:
CCPRxH
Duty Cycle Registers
Comparator
2:
x
CCPRxL
PWM Mode
PR2
L
TMR2
Comparator
Clearing the CCPxCON register will
relinquish CCPx control of the CCPx pin.
The 8-bit timer TMR2 register is concatenated
with the 2-bit internal system clock (F
2 bits of the prescaler, to create the 10-bit time
base.
In PWM mode, CCPRxH is a read-only register.
(2)
(Slave)
(1)
SIMPLIFIED PWM BLOCK
DIAGRAM
Clear Timer2,
toggle CCPx pin and
latch duty cycle
DCxB<1:0>
S
R
Q
TRIS
Advance Information
OSC
CCPx
), or
The PWM output (Figure 15-4) has a time base
(period) and a time that the output stays high (duty
cycle).
FIGURE 15-4:
PIC18F2XK20/4XK20
Pulse Width
TMR2 = 0
Period
CCP PWM OUTPUT
TMR2 = CCPRxL:DCxB<1:0>
TMR2 = PR2
DS41303B-page 159