MC68000 MOTOROLA [Motorola, Inc], MC68000 Datasheet - Page 119

• Manufacturer Part Number: MC68000
• Manufacturer: MOTOROLA [Motorola, Inc]

DRAM_Low—Dynamic RAM Low Address
INCREMENT—Increment Step
COUNT—RAM Refresh Cycle Count
T_ptr_H and T_ptr_L—Temporary Pointer High and Low
T - count—Temporary Count
3.10.6 Programming Example
An example of programming the DRAM parameters is given for the Motorola MC514256
DRAM. This 1M-bit DRAM is organized in a 256K 4 arrangement. There are 512 rows and
512 columns on this device. A bank of 4 of these DRAMs is assumed in this example, giving
512K-bytes of memory. If this bank is placed at location $000000 in the MC68302 address
space, its range would then be $0 to $7FFFFF. Assuming a RAS-only refresh technique is
used, acceptable parameters would be as follows:
The value of $0000 in DRAM_High results in the refresh access using a function code of
000. Usually, the function code is not required by the DRAM control logic but may assist in
the identification of DRAM refresh accesses during debugging. The starting address is
picked to be $000100 (instead of $000000) to avoid refreshing the BAR and SCR registers
on the IMP. Depending on the PAL design, an increment value of $0002 can actually refresh
a word at a time, even though the refresh access from the MC68302 is a byte read. The
COUNT value is the number of word refreshes required in the entire DRAM bank.
MOTOROLA
This 16-bit parameter contains the lower 16 bits of the dynamic RAM starting address.
This parameter should be initialized by the user before activating the refresh routine.
This 16-bit parameter contains the number of bytes in a row. The refresh routine will in-
crement its pointer with this parameter value every refresh cycle. This parameter should
be initialized by the user before activating the refresh routine.
This 16-bit parameter contains the number of rows in the DRAM. The refresh routine will
execute the COUNT number of refresh cycles before wrapping back to the RAM base ad-
dress. This parameter should be initialized by the user before activating the refresh rou-
tine.
These two 16--bit parameters contain the next refresh cycle address and function code to
be used by the CP. They correspond to DRAM_High and DRAM_Low, respectively.
This 16-bit parameter contains the number of refresh cycles that the DRAM refresh con-
troller must still perform before it will wrap to the beginning of the DRAM. This parameter
should be initialized to zero by the user before activating the refresh routine.
DRAM_High = $0000
DRAM_Low = $0100
INCREMENT = $0002
COUNT = $0200
T_Count = $0000
MC68302 USER’S MANUAL
System Integration Block (SIB)
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