ATAM510X-ILQY ATMEL [ATMEL Corporation], ATAM510X-ILQY Datasheet - Page 58

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ATAM510X-ILQY

Manufacturer Part Number
ATAM510X-ILQY
Description
MARC4 4-bit MTP Universal Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
3.7.3
3.7.4
Figure 3-30. In-System Programming
58
ATAM510
Read Lock Protection
In-System Programming
Programmer interface
*Optional jumpers
10
1
2
3
4
5
6
7
8
9
Application:
NC
NC
NC
The programmer software incorporates a so called “Read Lock” which can be set by the user.
This is provided for customer security purposes and inhibits the reading of the customer's Appli-
cation Program by unauthorized persons. If set, the “Read Lock” sets a hardware key in the MTP
EEPROM which disables reading of the Program/Configuration data. It should be noted that this
is a “Read Lock” and not a “Write Lock”, so even if the lock is set, it is still possible to overwrite
the customer data with new program code.
For “in-system programming”, the application circuit board must be fitted with a 10-pin male con-
nector to accommodate the TPI connector. To ensure conflict-free access to the target
ATAM510 TPI related pins (BP00, BP01, BP02 and PM) it is recommended that these be
equipped with jumpers (J5, J4, J3 and J1) to avoid signal contention with other on board driver
sources. (see
used in the application, then the jumpers can be omitted or replaced by isolating resistors. Prior
to connecting the TPI, all other application power supply sources should be disconnected from
the application circuit board. Should other on board components either present an excessive
power supply load or be unable to withstand the ICP 5-Volt supply voltage, then the VDD power
line should also be jumpered (J2).
During the programming operation all ports are set into input mode, with the previously pro-
grammed pull-up/pull-down transistors deactivated.
In normal operational mode, the PM pin is strapped to ground and Port 0 reverts to a port func-
tion as described in section “Bi-directional Port 0 and Port 1”.
NC
BP00
J5
Figure 7-1 on page
*
BP01
VSS
J4
BP02
*
VDD
J2
J3
*
63). However, if these can be overdriven, or if Port 0 is not
*
10
11
12
13
14
15
16
17
18
19
20
21
22
1
2
3
4
5
6
7
8
9
VSS
BP53
BP52
BP50
VDD
BP43
BP42
BP41
BP40
BP03
BP02
BP01
BP00
TIM1
BPC1
TE
BPC0
BP13
BP12
BP11
BP10
BP51
OSCOUT
OSCIN
SCLIN
AVDD
NRST
BPA0
BPA1
BPA2
BPA3
BPB3
BPB2
BPB1
BPB0
BPC3
BPC2
BP70
BP71
BP72
BP73
BP61
BP60
PM
44
43
42
41
40
39
38
37
36
34
33
32
31
30
29
28
27
26
25
24
23
3
5
*
J1
VSS
4711B–4BMCU–01/05

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