CY7C1470BV25_11 CYPRESS [Cypress Semiconductor], CY7C1470BV25_11 Datasheet - Page 20

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CY7C1470BV25_11

Manufacturer Part Number
CY7C1470BV25_11
Description
72-Mbit (2 M x 36/4 M x 18/1 M x 72) Pipelined SRAM with NoBL Architecture
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Electrical Characteristics
Over the Operating Range
Capacitance
Tested initially and after any design or process changes that may affect these parameters.
Thermal Resistance
Tested initially and after any design or process changes that may affect these parameters.
AC Test Loads and Waveforms
Document Number: 001-15032 Rev. *I
I
I
C
C
C
C
C
SB3
SB4
Parameter
ADDRESS
DATA
CTRL
CLK
IO
Parameter
Parameter
OUTPUT
2.5 V IO Test Load
JC
JA
Automatic CE
Power Down
Current—CMOS Inputs
Automatic CE
Power Down
Current—TTL Inputs
Address Input Capacitance
Data Input Capacitance
Control Input Capacitance
Clock Input Capacitance
Input/Output Capacitance
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
Z
0
= 50 
Description
Description
Description
[15, 16]
(a)
V
L
= 1.25 V
(continued)
R
L
(continued)
= 50 
Max. V
V
V
f = f
Max. V
V
OUTPUT
IN
IN
IN
2.5 V
MAX
 0.3 V or
> V
 V
Test conditions follow
standard test methods and
procedures for measuring
thermal impedance, per
EIA/JESD51.
T
V
V
INCLUDING
A
DD
DDQ
DD
DD
DDQ
IH
= 25 °C, f = 1 MHz,
= 1/t
JIG AND
, Device Deselected,
, Device Deselected,
SCOPE
or V
= 2.5 V
Test Conditions
Test Conditions
= 2.5 V
5 pF
0.3 V,
CYC
IN
 V
Test Conditions
IL
(b)
R = 1667 
, f = 0
R = 1538 
4.0-ns cycle, 250 MHz
5.0-ns cycle, 200 MHz
6.0-ns cycle, 167 MHz
All speed grades
100-pin TQFP
100-pin TQFP
CY7C1472BV25, CY7C1474BV25
Package
V
24.63
GND
DDQ
2.28
Max
6
5
8
6
5
 1 ns
10%
165-ball FBGA
165-ball FBGA
ALL INPUT PULSES
Package
16.3
Max
2.1
6
5
8
6
5
90%
Min
CY7C1470BV25
(c)
209-ball FBGA
209-ball FBGA
Package
15.2
Max
1.7
Max
6
5
8
6
5
200
200
200
135
90%
Page 20 of 29
10%
 1 ns
C/W
C/W
Unit
Unit
Unit
mA
mA
mA
mA
pF
pF
pF
pF
pF
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