MT48H16M32LFCJ-75 MICRON [Micron Technology], MT48H16M32LFCJ-75 Datasheet - Page 67
MT48H16M32LFCJ-75
Manufacturer Part Number
MT48H16M32LFCJ-75
Description
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Manufacturer
MICRON [Micron Technology]
Datasheet
1.MT48H16M32LFCJ-75.pdf
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Figure 50:
PDF: 09005aef81ca5de4/Source: 09005aef81ca5e03
MT48H32M16LF_1.fm - Rev. H 6/07 EN
COMMAND
BA0, BA1
ADDR
DQM
CKE
A10
CLK
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
T0
ROW
ROW
BANK
Single WRITE – Without Auto Precharge
t CMH
t AH
t AH
t AH
t CKH
Notes:
t RCD
t RAS
t RC
t CK
T1
NOP
1. For this example, BL = 1, and the WRITE burst is followed by a manual PRECHARGE.
2. 15ns is required between <D
3. PRECHARGE command not allowed or
DISABLE AUTO PRECHARGE
t CMS
t CL
COLUMN m
t DS
T2
WRITE
D
BANK
IN
t CH
t CMH
m
t DH
t WR 2
T3
NOP 3
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
67
IN
T4
NOP 3
m> and the PRECHARGE command, regardless of frequency.
t
Micron Technology, Inc., reserves the right to change products or specifications without notice.
SINGLE BANK
ALL BANKS
RAS would be violated.
PRECHARGE
BANK
T5
T6
t RP
NOP
©2005 Micron Technology, Inc. All rights reserved.
BANK
ROW
ACTIVE
T7
Timing Diagrams
T8
NOP
DON’T CARE
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