MT48H16M32LFCJ-75 MICRON [Micron Technology], MT48H16M32LFCJ-75 Datasheet - Page 28
MT48H16M32LFCJ-75
Manufacturer Part Number
MT48H16M32LFCJ-75
Description
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Manufacturer
MICRON [Micron Technology]
Datasheet
1.MT48H16M32LFCJ-75.pdf
(73 pages)
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Figure 15:
Figure 16:
PDF: 09005aef81ca5de4/Source: 09005aef81ca5e03
MT48H32M16LF_1.fm - Rev. H 6/07 EN
READ-to-WRITE with Extra Clock Cycle
READ-to-PRECHARGE
Notes:
Notes:
COMMAND
1. CL = 3. The READ command may be to any bank, and the WRITE command may be to any
1. DQM is LOW.
COMMAND
COMMAND
ADDRESS
ADDRESS
ADDRESS
bank.
DQM
CLK
CLK
CLK
DQ
DQ
DQ
BANK a,
BANK a,
COL n
COL n
T0
T0
BANK,
COL n
READ
READ
T0
READ
CL = 2
T1
T1
NOP
NOP
T1
NOP
CL = 3
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
T2
T2
NOP
NOP
T2
28
D
NOP
OUT
n
T3
T3
NOP
NOP
T3
D
D
n + 1
NOP
OUT
OUT
n
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t HZ
D
OUT
PRECHARGE
PRECHARGE
(a or all)
(a or all)
n
BANK
BANK
T4
T4
X = 1 cycle
D
n + 2
D
n + 1
T4
OUT
OUT
NOP
X = 2 cycles
T5
T5
DON’T CARE
NOP
NOP
D
D
n + 3
n + 2
T5
OUT
OUT
BANK,
COL b
WRITE
t RP
t RP
D
IN
b
t
T6
T6
DS
NOP
NOP
D
n + 3
OUT
©2005 Micron Technology, Inc. All rights reserved.
DON’T CARE
BANK a,
BANK a,
ACTIVE
T7
ACTIVE
T7
ROW
ROW
Operations
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