MT48H16M32LFCJ-75 MICRON [Micron Technology], MT48H16M32LFCJ-75 Datasheet - Page 35

• Manufacturer Part Number: MT48H16M32LFCJ-75
• Description: 512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
• Manufacturer: MICRON [Micron Technology]

Figure 26:
Deep Power-Down
Figure 27:
PDF: 09005aef81ca5de4/Source: 09005aef81ca5e03
MT48H32M16LF_1.fm - Rev. H 6/07 EN
Power-Down
Deep Power-Down Command
The power-down state is exited by registering a NOP or COMMAND INHIBIT and CKE
HIGH at the desired clock edge (meeting
COMMAND
Deep power-down mode is a maximum power savings feature achieved by shutting off
the power to the entire memory array of the device. Data on the memory array will not
be retained once deep power-down mode is executed. Deep power-down mode is
entered by having all banks idle then CS# and WE# held LOW with RAS# and CAS# HIGH
at the rising edge of the clock, while CKE is LOW. CKE must be held LOW during deep
power-down.
BA0, BA1
CKE
CLK
A0–A12
All banks idle
RAS#
CAS#
WE#
Enter power-down mode.
CK#
CKE
CS#
CK
t CKS
NOP
DON’T CARE
Input buffers gated off
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
35
(
(
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(
(
(
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Exit power-down mode.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
CKS). See Figure 28 on page 36.
> t CKS
NOP
DON’T CARE
©2005 Micron Technology, Inc. All rights reserved.
ACTIVE
t RCD
t RAS
t RC
Operations