MT48H16M32LFCJ-75 MICRON [Micron Technology], MT48H16M32LFCJ-75 Datasheet - Page 53

• Manufacturer Part Number: MT48H16M32LFCJ-75
• Description: 512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
• Manufacturer: MICRON [Micron Technology]

Timing Diagrams
Figure 36:
PDF: 09005aef81ca5de4/Source: 09005aef81ca5e03
MT48H32M16LF_1.fm - Rev. H 6/07 EN
COMMAND
A0-A9, A11
BA0, BA1
DQM
A10
CKE
Initialize and Load Mode Register
CLK
DQ
1
Notes:
Power-up:
V
CLK stable
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T = 100µs
and
t
1. PRE = PRECHARGE command, AR = AUTO REFRESH command, LMR = LOAD MODE REGISTER
2. Only NOPs or COMMAND INHIBITs may be issued during
3. At least one NOP or COMMAND INHIBIT is required during
CMS
t
CKS
NOP
T0
command.
t
t
High-Z
CKH
CMH
t
CK
ALL BANKS
t
Precharge
AS
all banks
PRE
T1
t AH
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512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Tn + 1
AR
53
t
RFC
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2
To + 1
AR
Micron Technology, Inc., reserves the right to change products or specifications without notice.
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2
t AS t AH
t
Load Mode
AS
BA0 = L,
BA1 = L
Register
CODE
Tp + 1
CODE
LMR
t
AH
t
MRD
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RFC time.
Load Extended
Mode Register
3
t
MRD time.
BA0 = L,
BA1 = H
BA0 = L,
BA1 = L
CODE
CODE
Tq + 1
LMR
©2005 Micron Technology, Inc. All rights reserved.
Timing Diagrams
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3
VALID
VALID
VALID
VALID
DON’T CARE
Tr + 1
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