MT46V16M8TG-8L MICRON [Micron Technology], MT46V16M8TG-8L Datasheet - Page 31

• Manufacturer Part Number: MT46V16M8TG-8L
• Description: DOUBLE DATA RATE DDR SDRAM
• Manufacturer: MICRON [Micron Technology]

128Mb: x4, x8, x16 DDR SDRAM
128Mx4x8x16DDR_C.p65 – Rev. C; Pub. 4/01
COMMAND
ADDRESS
t
t
t
DQSS (NOM)
DQSS (MIN)
DQSS (MAX)
NOTE: 1. DI b = data-in for column b.
DQS
DQS
DQS
CK#
DM
DM
DM
DQ
DQ
DQ
CK
2. Three subsequent elements of data-in are applied in the programmed order following DI b.
3. An uninterrupted burst of 4 is shown.
4. t WTR is referenced from the first positive CK edge after the last data-in pair.
5. The READ and WRITE commands are to same device. However, the READ and WRITE commands may be
6. A10 is LOW with the WRITE command (auto precharge is disabled).
to different devices, in which case t WTR is not required and the READ command could be applied earlier.
Bank a,
WRITE
Col b
T0
t
t
t
DQSS
DQSS
DQSS
DI
b
NOP
T1
DI
b
WRITE to READ – Uninterrupting
DI
b
T1n
NOP
T2
Figure 19
T2n
31
T3
NOP
t
WTR
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Bank a,
READ
Col n
T4
DON’T CARE
128Mb: x4, x8, x16
CL = 2
CL = 2
CL = 2
T5
NOP
DDR SDRAM
TRANSITIONING DATA
PRELIMINARY
©2001, Micron Technology, Inc.
T6
NOP
DI
DI
DI
n
n
n
T6n