S29CD016G SPANSION, S29CD016G Datasheet - Page 5

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S29CD016G

Manufacturer Part Number
S29CD016G
Description
16 Megabit (512 K x 32-Bit) CMOS 2.5 Volt-only Burst Mode / Dual Boot / Simultaneous Read/Write Flash Memory
Manufacturer
SPANSION
Datasheet

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Write Operation Status . . . . . . . . . . . . . . . . . . . . . 61
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . 67
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . .67
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . .68
November 5, 2004 S29CD016_00_A4
Password Program Command .......................................................... 54
Password Verify Command ............................................................... 54
Password Protection Mode Locking Bit Program Command . 55
Persistent Sector Protection Mode Locking Bit Program Com-
mand ......................................................................................................... 55
SecSi Sector Protection Bit Program Command ........................ 55
PPB Lock Bit Set Command .............................................................. 55
DYB Write Command ........................................................................ 56
Password Unlock Command ............................................................. 56
PPB Program Command ..................................................................... 56
All PPB Erase Command .................................................................... 57
DYB Write .............................................................................................. 57
PPB Lock Bit Set .................................................................................... 57
DYB Status .............................................................................................. 57
PPB Status ............................................................................................... 57
PPB Lock Bit Status .............................................................................. 57
Non-volatile Protection Bit Program And Erase Flow ............. 58
DQ7: Data# Polling ............................................................................... 61
RY/BY#: Ready/Busy# ......................................................................... 63
DQ6: Toggle Bit I .................................................................................. 63
DQ2: Toggle Bit II ................................................................................ 64
Reading Toggle Bits DQ6/DQ2 ........................................................ 64
DQ5: Exceeded Timing Limits .......................................................... 66
DQ3: Sector Erase Timer .................................................................. 66
Table 19. Memory Array Command Definitions (x32 Mode)
59
Table 20. Sector Protection Command Definitions (x32
Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Figure 6. Data# Polling Algorithm . . . . . . . . . . . . . . 62
Figure 7. Toggle Bit Algorithm . . . . . . . . . . . . . . . . . 65
Table 21. Write Operation Status . . . . . . . . . . . . . . . 66
Figure 8. Maximum Negative Overshoot Waveform . . 67
Figure 9. Maximum Positive Overshoot Waveform . . . 67
Industrial (I) Devices ...................................................................................................... 67
Extended (E) Devices .................................................................................................... 67
V
V
Table 22. CMOS Compatible . . . . . . . . . . . . . . . . . . . 68
Figure 10. I
CC
IO
Supply Voltages ....................................................................................................... 67
Supply Voltages ...................................................................................................... 67
CC1
Current vs. Time (Showing Active and Auto-
A d v a n c e
I n f o r m a t i o n
S29CD016G
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Key to Switching Waveforms . . . . . . . . . . . . . . . . 70
Switching Waveforms . . . . . . . . . . . . . . . . . . . . . . 70
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . .71
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . 87
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . . 89
PRQ080–80-Lead Plastic Quad Flat Package 87
LAA080–80-ball Fortified Ball Grid Array (13 x 11
mm) 88
matic Sleep Currents) . . . . . . . . . . . . . . . . . . . . . . . 69
Figure 11. Typical I
Figure 12. Test Setup . . . . . . . . . . . . . . . . . . . . . . . 70
Table 23. Test Specifications . . . . . . . . . . . . . . . . . . . 70
Figure 13. Input Waveforms and Measurement Levels 70
Figure 14. V
Table 24. Asynchronous Read Operations . . . . . . . . . . 72
Figure 15. Conventional Read Operations Timings . . . 72
Table 25. Burst Mode Read . . . . . . . . . . . . . . . . . . . . 73
Figure 16. Burst Mode Read (x32 Mode) . . . . . . . . . . 74
Figure 17. Asynchronous Command Write Timing . . . . 75
Figure 18. Synchronous Command Write/Read Timing 75
Table 26. Hardware Reset (RESET#) . . . . . . . . . . . . . 76
Figure 19. RESET# Timings . . . . . . . . . . . . . . . . . . . 76
Figure 20. WP# Timing . . . . . . . . . . . . . . . . . . . . . . 77
Table 27. Erase/Program Operations . . . . . . . . . . . . . 78
Figure 21. Program Operation Timings . . . . . . . . . . . 79
Figure 22. Chip/Sector Erase Operation Timings. . . . . 80
Figure 23. Back-to-back Cycle Timings . . . . . . . . . . . 80
Figure 24. Data# Polling Timings
(During Embedded Algorithms) . . . . . . . . . . . . . . . . 81
Figure 25. Toggle Bit Timings
(During Embedded Algorithms) . . . . . . . . . . . . . . . . 81
Figure 26. DQ2 vs. DQ6 for Erase/Erase Suspend Operations
82
Figure 27. Synchronous Data Polling Timing/Toggle Bit Tim-
ings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Figure 28. Sector Protect/Unprotect Timing Diagram . 83
Table 28. Alternate CE# Controlled Erase/Program Opera-
tions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Figure 29. Alternate CE# Controlled Write Operation Tim-
ings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Table 29. Erase and Programming Performance . . . . . 86
Table 30. PQFP and Fortified BGA Pin Capacitance . . . . 86
CC
and V
CC1
IO
vs. Frequency . . . . . . . . . . . . 69
Power-up Diagram. . . . . . . . . 71
5

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