LTC2485 LINER [Linear Technology], LTC2485 Datasheet - Page 28

• Manufacturer Part Number: LTC2485
• Description: 24-Bit ?? ADC with Easy Drive Input Current Cancellation and I2C Interface
• Manufacturer: LINER [Linear Technology]

APPLICATIO S I FOR ATIO
Due to the complex filtering and calibration algorithms
utilized, the converter input bandwidth is not modeled
very accurately by a first order filter with the pole located
at the 3dB frequency. When the internal oscillator is
used, the shape of the LTC2485 input bandwidth is
shown in Figure 29. When an external oscillator of fre-
quency f
bandwidth can be derived from Figure 29, 60Hz mode
curve in which the horizontal axis is scaled by
f
The conversion noise (600nV
be modeled by a white noise source connected to a noise
free converter. The noise spectral density is 47nV√Hz for
an infinite bandwidth source and 64nV√Hz for a single
0.5MHz pole source. From these numbers, it is clear that
particular attention must be given to the design of external
amplification circuits. Such circuits face the simultaneous
requirements of very low bandwidth (just a few Hz) in order
to reduce the output referred noise and relatively high
bandwidth (at least 500kHz) necessary to drive the input
switched-capacitor network. A possible solution is a high
gain, low bandwidth amplifier stage followed by a high
bandwidth unity-gain buffer.
When external amplifiers are driving the LTC2485, the
ADC input referred system noise calculation can be
simplified by Figure 30. The noise of an amplifier driving
the LTC2485 input pin can be modeled as a band limited
white noise source. Its bandwidth can be approximated
by the bandwidth of a single pole lowpass filter with a
corner frequency f
is n
can find on the y-axis the noise equivalent bandwidth
freq
cludes the band limiting effects of the ADC internal
calibration and filtering. The noise of the driving ampli-
fier referred to the converter input and including all these
effects can be calculated as N = n
system noise (referred to the LTC2485 input) can now be
obtained by summing as square root of sum of squares
the three ADC input referred noise sources: the LTC2485
internal noise, the noise of the IN
the noise of the IN
LTC2485
28
EOSC
i
i
. From Figure 30, using f
/307200.
of the input driving amplifier. This bandwidth in-
EOSC
is used, the shape of the LTC2485 input
i
–
U
. The amplifier noise spectral density
driving amplifier.
U
RMS
i
as the x-axis selector, we
typical for V
+
W
driving amplifier and
i
• √freq
REF
i
. The total
U
= 5V) can
If the CA0/F
frequency f
calculation if the x-axis is scaled by f
large values of the ratio f
accuracy begins to decrease, but at the same time the
LTC2485 noise floor rises and the noise contribution of the
driving amplifiers lose significance.
Normal Mode Rejection and Antialiasing
One of the advantages delta-sigma ADCs offer over con-
ventional ADCs is on-chip digital filtering. Combined with
a large oversampling ratio, the LTC2485 significantly
simplifies antialiasing filter requirements. Additionally,
the input current cancellation feature of the LTC2485
allows external lowpass filtering without degrading the DC
performance of the device.
The SINC
mal mode rejection at all frequencies except DC and
integer multiples of the modulator sampling frequency
(f
plify the antialiasing requirements by additional normal
mode signal filtering both in the analog and digital domain.
Independent of the operating mode, f
• f
the maximum output data rate. In the internal oscillator
mode with a 50Hz notch setting, f
50Hz/60Hz rejection, f
setting f
f
is shown in Figures 31 and 32.
In 1x speed mode, the regions of low rejection occurring
at integer multiples of f
Magnified details of the normal mode rejection curves are
shown in Figure 33 (rejection near DC) and Figure 34
(rejection at f
frequency. These curves have been derived for the exter-
nal oscillator mode but they can be used in all operating
modes by appropriately selecting the f
EOSC
S
OUTMAX
). The LTC2485’s autocalibration circuits further sim-
/20. The performance of the normal mode rejection
S
4
= 15360Hz. In the external oscillator mode, f
where f
digital filter provides greater than 120dB nor-
EOSC
0
S
pin is driven by an external oscillator of
= 256f
, Figure 30 can still be used for noise
N
is the notch frequency and f
S
N
= 13960Hz and with a 60Hz notch
S
) where f
EOSC
have a very narrow bandwidth.
/307200, the Figure 30 plot
N
represents the notch
S
S
N
EOSC
= 256 • f
= 12800Hz, with
value.
/307200. For
OUTMAX
N
= 2048
2485fa
S
is
=