LTC2485 LINER [Linear Technology], LTC2485 Datasheet - Page 19

• Manufacturer Part Number: LTC2485
• Description: 24-Bit ?? ADC with Easy Drive Input Current Cancellation and I2C Interface
• Manufacturer: LINER [Linear Technology]

APPLICATIO S I FOR ATIO
LTC2485 incorporates a highly accurate on-chip oscillator.
This eliminates the need for external frequency setting com-
ponents such as crystals or oscillators.
Frequency Rejection Selection (CA0/F
The LTC2485 internal oscillator provides better than 110dB
normal mode rejection at the line frequency and all its
harmonics (up to the 255th) for 50Hz ±2% or 60Hz ±2%,
or better than 87dB normal mode rejection from 48Hz to
62.4Hz. The rejection mode is selected by writing to the
on-chip configuration register (the default mode at power
up is simultaneous 50Hz/60Hz rejection).
When a fundamental rejection frequency different from
50Hz or 60Hz is required or when the converter must be
synchronized with an outside source, the LTC2485 can
operate with an external conversion clock. The converter
automatically detects the presence of an external clock
signal at the CA0/F
tor. The chip address for CA0 is internally set HIGH. The
frequency f
10kHz to be detected. The external clock signal duty cycle
is not significant as long as the minimum and maximum
specifications for the high and low periods t
are observed.
While operating with an external conversion clock of a
frequency f
normal mode rejection in a frequency range of f
±4% and its harmonics. The normal mode rejection as a
function of the input frequency deviation from f
is shown in Figure 10.
Table 6. LTC2485 State Duration
STATE
CONVERSION
EOSC
EOSC
, the LTC2485 provides better than 110dB
of the external signal must be at least
OPERATING MODE
Internal Oscillator
External Oscillator
0
U
pin and turns off the internal oscilla-
U
W
0
)
60Hz Rejection
50Hz Rejection
50Hz/60Hz Rejection
CA0/F
with Frequency f
(f
EOSC
HEO
U
EOSC
EOSC
0
/5120 Rejection)
= External Oscillator
and t
/5120
/5120
LEO
EOSC
Hz
Whenever an external clock is not present at the CA0/F
pin, the converter automatically activates its internal os-
cillator and enters the Internal Conversion Clock mode.
CA0/F
chip address. The LTC2485 operation will not be dis-
turbed if the change of conversion clock source occurs
during the sleep state or during the data output state while
the converter uses an external serial clock. If the change
occurs during the conversion state, the result of the
conversion in progress may be outside specifications but
the following conversions will not be affected.
Table 5 summarizes the duration of the conversion state of
each state and the achievable output data rate as a function
of f
EOSC
0
Figure 10. LTC2485 Normal Mode Rejection When
Using an External Oscillator
DURATION
133ms, Output Data Rate ≤ 7.5 Readings/s for 1x Speed Mode
67ms, Output Data Rate ≤ 15 Readings/s for 2x Speed Mode
160ms, Output Data Rate ≤ 6.2 Readings/s for 1x Speed Mode
80ms, Output Data Rate ≤ 12.5 Readings/s for 2x Speed Mode
147ms, Output Data Rate ≤ 6.8 Readings/s for 1x Speed Mode
73.6ms, Output Data Rate ≤ 13.6 Readings/s for 2x Speed Mode
41036/f
1x Speed Mode
20556/f
2x Speed Mode
may be tied HIGH or left floating in order to set the
.
–100
–105
–110
–115
–120
–125
–130
–135
–140
–80
–85
–90
–95
DEVIATION FROM NOTCH FREQUENCY f
EOSC
EOSC
–12
DIFFERENTIAL INPUT SIGNAL FREQUENCY
s, Output Data Rate ≤ f
s, Output Data Rate ≤ f
–8
–4
0
EOSC
EOSC
4
/41036 Readings/s for
/20556 Readings/s for
EOSC
8
/5120(%)
2485 F10
LTC2485
12
19
2485fa
0