AS1545_1 AMSCO [austriamicrosystems AG], AS1545_1 Datasheet - Page 9

• Manufacturer Part Number: AS1545_1
• Description: Dual, 12-Bit, 1MSPS, SAR ADC
• Manufacturer: AMSCO [austriamicrosystems AG]

AS1545
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
Timing Characteristics
AV
(unless otherwise specified).
Table 4. Timing Characteristics
1. Based on simulation and characterised samples.
2. V
3. V
Figure 3. Timing Diagram
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CSN Fall to SCLK Fall Setup
CSN Minimum Pulse Width
SCLK Fall to D
CSN Rise to D
DD
CSN Fall to D
SCLK Fall to D
SCLK Fall to D
IL
IL
Master Clock Frequency
SCLK High Pulse Width
SCLK Low Pulse Width
of SCLK to V
of SCLK to V
= DV
DOUTA
DOUTB
Conversion Time
SCLK
CSN
Parameter
Quiet Time
DD
Time
= 2.7V to 5.25V, V
THREE-
t
STATE
CSS
OUT
OUT
OUT
OUT
OUT
OH
OL
Enable
3 LEADING ZEROES
Disable
Disable
of D
of D
Valid
Hold
0
t
1
CSDOE
OUT
OUT
2
3
0
(rising edge) / V
(rising edge) / V
2
1
DRIVE
t
Symbol
CONVERT
t
t
0
t
CSDOD
t
CSDOE
f
QUIET
t
CSPW
t
t
t
SCLK
DOH
DOD
CSS
DOV
t
t
CH
CL
3
= 2.7V to AV
DB11
V
Minimum time between end of serial
IH
4
DB10
read and next falling edge of CSN
OH
V
OL
of CSN to corner of D
t
t
DOV
CH
IH
V
of D
of D
IL
V
of SCLK to corner of D
DD
IL
5
t
of CSN to Corner of D
DOH
Revision 1.01
DB9
of CSN to V
V
/DV
V
OUT
OUT
V
IH
f
t
IL
IH
SCLK
SCLK
V
V
Conditions
V
V
to V
to V
DD
to V
(falling edge)
(falling edge)
DD
DD
DD
DD
Tristate
, internal/external reference = 2.5V, T
= 20 MHz
= 1/f
= 5.25V
= 5.25V
IL
IH
= 2.7V
= 2.7V
IH
of SCLK
of SCLK
of CSN
IL
SCLK
DB2
of SCLK
OUT
t
CL
to Tristate
OUT
OUT
DB1
to
14
t
CSDOD
B
DB0
t
t
Min
SCLK
SCLK
0.4
0.4
30
10
10
30
1
5
5
THREE-STATE
t
QUIET
Typ
t
A
CSPW
= -40 to +85°C
t
t
t
Max
15 x
SCLK
SCLK
SCLK
750
0.6
0.6
20
15
40
10
20
50
Units
MHz
9 - 34
ns
ns
ns
ns
ns
ns
ns
ns
ns