AS1545_1 AMSCO [austriamicrosystems AG], AS1545_1 Datasheet - Page 29

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AS1545_1

Manufacturer Part Number
AS1545_1
Description
Dual, 12-Bit, 1MSPS, SAR ADC
Manufacturer
AMSCO [austriamicrosystems AG]
Datasheet
AS1545
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
Figure 52. Reading Data from Both ADCs on One D
Figure 53. 32 SCLKs Data transfer for all modes in D
Difference calculator and quadrature signals calculator
The AS1545 internally calculates the difference between the output codes of ADC A and ADC B. There are several
requirements that need to be taken into account in order to work with the difference calculator. First off, the output data
of both ADCs needs to be in straight binary coding. This means that the difference calculator will only give the correct
results in single ended and pseudo differential modes. Also, it is important to note that in order to read the data from
the difference calculator we must read all 32 bits of data of the ADC, therefore reducing the overall sampling rate of the
ADC by half.
The difference calculator will always give you a 13 bit two’s complement result. The first bit is the sign of the operation
and the next 12 bits are the data. For simplicity in the design, an systematic error of 1 LSB can be expected from the
difference calculator.
Below we have an detailed example describing the operation of the difference calculator.
Let’s assume that V
DOUT_A = 1010 1010 1010 or 2730 in decimal
DOUT_B = 1100 1100 1100 or 3276 in decimal
The difference should be 2730-3276=-546 in decimal
In 2’s complement -546 is 1 1101 1101 1110 in binary. This is a 1 for the minus sign plus 4096-546=3550 in decimal
which corresponds to 1101 1101 1110 in binary
As stated before, there is a -1LSB error in the operation so the actual output should be -547 in decimal which
corresponds to 1 1101 1101 1101 in binary which is the result that the difference calculator clocks out.
www.austriamicrosystems.com
* only applicable when SGL/DIFF = 0 ; Α2=1, Α1=1, Α0=0
DOUTA
DOUTA
DOUTA*
DOUTB
SCLK
CSN
CSN
THREE-
STATE
t
CSS
3 LEADING
0
ZEROES
t
1
CSDOE
IN
000
000
000
0
A = 1.667V V
2
0
3
DB11
SDATA_A
SDATA_A
SDATA_A
IN
16bit
A
B = 2V V
4
DB10
t
DOV
t
CH
A
t
5
CL
REF
1 TRAILING
= 2.5V and we are working in single ended mode.
15
ZERO
t
0
0
0
OUT
Revision 1.01
DOH
0
OUTA
16
Line with 32 SCLKs
, D
00
00
00
0
3 LEADING ZEROES
OUTB
17
0
Counter + DIR + A + B
18
0+SDATA_B
0
16bit
DIF
DB11
B
DB0
0
0
0
1 TRAILING ZERO
B
0
32
t
DOD
THREE-
STATE
29 - 34

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