AS1545_1 AMSCO [austriamicrosystems AG], AS1545_1 Datasheet - Page 23

• Manufacturer Part Number: AS1545_1
• Description: Dual, 12-Bit, 1MSPS, SAR ADC
• Manufacturer: AMSCO [austriamicrosystems AG]

AS1545
Datasheet - D e t a i l e d D e s c r i p t i o n
Analog-to-Digital Conversion
The analog inputs of the AS1545 can be configured as single-ended pseudo-differential or fully differential via the SGL/
DIFF logic pin, as shown in
ADC are set up as three fully differential pairs or 3 pseudo-differential inputs. If this pin is at logic high, the analog input
channels to each on-chip ADC are set up as six single-ended analog inputs. The required logic level on this pin needs
to be established prior to the acquisition time and remain unchanged during the conversion time until the track-and-
hold has returned to track. The track-and-hold returns to track on the 13th rising edge of SCLK after the CSN falling
edge
level during acquisition and conversion to avoid corrupting the conversion in progress.
The channels used for simultaneous conversions are selected via the multiplexer address input pins, A0 to A2. The
logic states of these pins also need to be established prior to the acquisition time; however, they may change during
the conversion time, provided that the mode is not changed. If the mode is changed from fully differential to pseudo-
differential, for example, then the acquisition time would start again from this point. The selected input channels are
decoded as shown in
The analog input range of the AS1545 can be selected as [0V to V
-V
that of the SGL/DIFF pin by setting the logic state of the RANGE pin a time t
logic level on this pin can be altered after the third falling edge of SCLK. If this pin is tied to a logic low, the analog input
range selected is [0V to V
[0V to 2×V
Figure 41. Selecting Differential or Singe-Ended Configuration
Output Coding
The AS1545 output coding is set to either twos complement or straight binary, depending on which analog input
configuration is selected for a conversion. Output coding scheme for each possible analog input configuration is show
in the
Table 7. AS1545 Output Coding
Transfer Functions
The designed code transitions occur at successive integer LSB values (1 LSB, 2 LSB, and so on). In single-ended
mode, the LSB size is V
to 2 × V
characteristic for the AS1545 when straight binary coding is output is shown (with the 2 × V
Figure 43 on page
www.austriamicrosystems.com
REF
CSN
SCLK
SGL/
DIFF
(see Figure
Table
to +V
REF
REF
REF
range is used. In differential mode, the LSB size is 2 × V
7.
or -V
] via the RANGE and MODE pin
51). If the level on this pin is changed, it is recognized by the AS1545; therefore, keep the same logic
24, and
REF
Pseudo-Differential
Table 5 on page
A
Single-Ended
to +V
REF
Differential
REF
MODE
Figure 44
/4096 when the 0V to V
Figure
t
1
ACQ
REF
or -V
].
REF
41. If this pin is coupled to a logic low, the analog input channels to each on-chip
&
/2 to +V
20.
Figure 45 on page 24
REF
(see Table 5 on page
/2]. If this pin is tied to a logic high, the analog input range selected is
14
REF
Revision 1.01
range is used, and the LSB size is 2 × V
shows the twos complement.
REF
REF
20). This selection is made in a similar fashion to
or -V
/4096 when the 0V to V
REF
ACQ
B
/2 to +V
Twos complement
prior to the falling edge of CSN. The
Output Coding
1
Straight binary
Straight binary
REF
/2] or [0V to 2×V
REF
REF
REF
range) in
/4096 when the 0V
. The ideal transfer
14
Figure 42
REF
23 - 34
or
&