bc41b143a07 ETC-unknow, bc41b143a07 Datasheet - Page 84

• Manufacturer Part Number: bc41b143a07
• Description: Single Chip Bluetooth
• Manufacturer: ETC-unknow

On reset and up to the time the PIO has been configured, PIO[2] will be tri-state. Therefore, the developer must ensure
that the circuitry connected to this pin is pulled via a 470kΩ resistor to the appropriate power rail. This ensures that the
TCXO is oscillating at start up.
9.12
BlueCore4-ROM may be reset from several sources:
The RESET pin is an active high reset and is internally filtered using the internal low frequency clock oscillator. A reset
will be performed between 1.5ms and 4.0ms following RESET being active. It is recommended that RESET be applied
for a period greater than 5ms. The RESETB pin is the active low version of RESET and is OR'd on-chip with the active
high RESET, with either causing the reset function.
The power on reset occurs when the VDD_CORE supply falls below typically 1.5V and is released when VDD_CORE
rises above typically 1.6V.
At reset the digital I/O pins are set to inputs for bi-directional pins and outputs are tri-state. The PIOs have weak
pull-downs.
Following a reset, BlueCore4-ROM assumes the maximum XTAL_IN frequency, which ensures that the internal clocks
run at a safe (low) frequency until BlueCore4-ROM is configured for the actual XTAL_IN frequency. If no clock is
present at XTAL_IN, the oscillator in BlueCore4-ROM free runs, again at a safe frequency.
CS-101564-DSP12
RESET or RESETB pins
Power on reset
A UART break character
Via a software configured watchdog timer
RESET and RESETB
VDD
Enable
TCXO
Figure 9.28: Example TCXO Enable OR Function
Production Information
© CSR plc 2003-2007
CLK IN
CLK REQ IN/
PIO[3]
CLK IN
BlueCore System
GSM System
CLK REQ OUT/
CLK REQ OUT
PIO[2]
Device Terminal Descriptions
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