bc41b143a07 ETC-unknow, bc41b143a07 Datasheet - Page 50

• Manufacturer Part Number: bc41b143a07
• Description: Single Chip Bluetooth
• Manufacturer: ETC-unknow

9.1.2
This is the single-ended RF input from the antenna. The input presents a complex impedance that requires a matching
network between the terminal and the antenna. Starting from the substrate (chip) side, the input can be modelled as
a lossy capacitor with the bond wire to the ball grid represented as a series inductance.
The terminal is DC blocked. The DC level must not exceed (VSS_RADIO -0.3V to VDD_RADIO + 0.3V).
9.1.3
An 8-bit voltage DAC (AUX_DAC) is used to control the amplification level of the external PA for Class 1 operation.
The DAC output is derived from the on-chip band gap and is virtually independent of temperature and supply voltage.
The output voltage is given by:
for a load current ≤10mA (sourced from the device).
or
for no load current.
BlueCore4-ROM enables the external PA only when transmitting. Before transmitting, the chip normally ramps up the
power to the internal PA, then it ramps it down again afterwards. However, if a suitable external PA is used, it may be
possible to ramp the power externally by driving the TX_PWR pin on the PA from AUX_DAC.
PSKEY_TX_GAINRAMP (0x1d), is used to control the delay (in units of µs) between the end of the transmit power
ramp and the start of modulation. In this period the carrier is transmitted, which gives the transmit circuitry time to fully
settle to the correct frequency.
Bits[15:8] define a delay, tcarrier, (in units of µs) between the end of the transmit power ramp and the start of
modulation. In this period the carrier is transmitted, which aids interoperability with some other vendor equipment
which is not strictly Bluetooth compliant.
CS-101564-DSP12
Modulation
TX Power
Single-Ended Input
Transmit RF Power Control for Class 1 Applications (TX_PWR)
Equation 9.1: Output Voltage with Load Current ≤ 10mA
V
Equation 9.2: Output Voltage with No Load Current
DAC
V
DAC
=
t
carrier
MIN
Equation 9.3: Internal Power Ramping
=
MIN
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3
3 .
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v
3
Production Information
×
3 .
© CSR plc 2003-2007
CNTRL
v
×
CNTRL
255
_
W ORD
255
_
W ORD
⎞
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,
(
VDD
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,
VDD
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PIO
_
PIO
−
0
3 .
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Device Terminal Descriptions
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