bc41b143a07 ETC-unknow, bc41b143a07 Datasheet - Page 53

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bc41b143a07

Manufacturer Part Number
bc41b143a07
Description
Single Chip Bluetooth
Manufacturer
ETC-unknow
Datasheet

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Device Terminal Descriptions
9.2.4
Clock Start-Up Delay
BlueCore4-ROM hardware incorporates an automatic delay after the assertion of the system clock request signal
before running firmware. By default, the delay is 5 low-power oscillator (LPO) cycles. At a nominal LPO frequency of
1 kHz, this equates to 5 ms. This is suitable for most applications using an external clock source.
However, there may be scenarios where the clock cannot be guaranteed to either exist or be stable after this period.
Under these conditions, BlueCore4-ROM provides a function that alters the system clock request signal to the period
stored in PSKEY_CLOCK_STARTUP_DELAY. This value is in units of LPO cycles from 1 to 31. Setting the key to
zero gives a delay of 5 cycles, the default value.
The nominal frequency of the internal LPO is 1 kHz, however, the value varies somewhat between chips, so care
should be taken to pick a suitable value. If an external slow clock at 32 kHz is supplied, this is divided by 32 before use.
This PS Key allows the designer to optimise a system where clock latencies may be longer than 5ms while still keeping
the current consumption of BlueCore4-ROM as low as possible. BlueCore4-ROM consumes about 2mA of current for
the duration of PSKEY_CLOCK_STARTUP_DELAY before activating the firmware.
Production Information
CS-101564-DSP12
Page 53 of 97
© CSR plc 2003-2007

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