ak8823 AKM Semiconductor, Inc., ak8823 Datasheet - Page 62

• Manufacturer Part Number: ak8823
• Description: Hdtv & Ntsc/pal Multi-format Encoder Sdtv/hdtv X2 Oversampling 5ch Dacs
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
HDYPBPR Delay Control Register (R/W) [Address 0x02]
Delay amounts of HDY signal and HDPb / HDPr signals are set.
Address 0x02
HDY/HDPBPR Delay Control Register Definition
MS0549-E-02
bit 0
bit 2
bit 3
bit 4
bit 6
bit 7
Reserved
BIT
~
~
bit 7
0
HDPBPRDEL
HDPBPRDEL
HDYDELAY0
HDYDELAY2
Reserved
Reserved
Register
Name
AY0
AY2
HDPBPRDEL
~
~
< HD Block >
bit 6
AY2
0
HDY Delay Set bits
Reserved bit
C Delay Set bits
Reserved bit
HDPBPRDEL
bit 5
AY1
0
HDPBPRDEL
R/W
R/W
R/W
R/W
R/W
bit 4
AY0
0
Default Value
62
Luminance signal delay amount is set. It is a delay from
SYNC signal.
Delay amount is set, based on 27 MHz clock in 480i / p
modes, and 74.25 MHz clock in 1080i / 720p modes.
HDPb / HDPr are handled in the same way as HDY by these
bit manipulation.
[ HDYDELAY2 : HDYDELAY0 ] - bit
000 : delay amount 0
001 : 1 CLK time is delayed.
010 : 2 CLK time is delayed.
011 : 3 CLK time is delayed.
111 : 1 CLK time is advanced to output.
110 : 2 CLK time is advanced to output.
101 : 3 CLK time is advanced to output.
100 : reserved
write “ 0 “.
Chroma signal delay amount is set. It is a delay from
Luminance signal.
Delay amount is set, based on 27 MHz clock in
and 74.25 MHz clock in 1080i / 720p modes.
Both PB/PR are delayed by the same amount, by setting
Delay Amount.
[ HDPBPRDELAY2 : HDPBPRDELAY0 ] – bit
000 : delay amount 0
001 : 1 CLK time is delayed.
010 : 2 CLK time is delayed.
011 : 3 CLK time is delayed.
111 : 1 CLK time is advanced to output.
110 : 2 CLK time is advanced to output.
101 : 3 CLK time is advanced to output.
100 : reserved
write “ 0 “.
Reserved
bit 3
0
HDYDELAY
bit 2
2
0
Definition
HDYDEALY
bit 1
1
0
Default Value 0x00
480i/p
HDYDELAY
bit 0
modes,
2006/10
0
0
[AK8823]