ak8823 AKM Semiconductor, Inc., ak8823 Datasheet - Page 14

• Manufacturer Part Number: ak8823
• Description: Hdtv & Ntsc/pal Multi-format Encoder Sdtv/hdtv X2 Oversampling 5ch Dacs
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
7. Video Input / Output Outline
Signal Capture Synchronization is selectable from 2 modes by register setting – one is to decode EAV code which is encoded
on Input signal, or the other is to synchronize with HSYNC_SD / VSYNC_SD or HSYNC_HD / VSYNC_HD signals.
1080i / 720p ) and Frame Rates ( 50 Hz / 60 Hz ) are set. Signals on SD Port can be transferred to HD Block by proper setting,
and vice versa ( HD Port signal to SD Block is also possible ). But it is only true with D1 signal on HD Input Port
(Note)
CLK_SD pin.
The AK8823 has on-chip PLL.
Description with parenthesis ( x 2 etc. ), following frequency value in DAC_CLOCK column shows an integer- multiple number
( multiplier ) and the selected input clock source.
8. PLL function
The AK8823 has on-chip PLL for clock multiplier.
When HD block is enabled, frequency-multiplied operation as described above is executed while 27 MHz is used in SD block as
its input clock.
9. Video DAC
The AK8823 has 10-bit resolution, discrete 2 channel Current Drive DACs which run at 27MHz, and discrete 3 channel DACs
which run at 150MHz.
These DACs are designed to output 1.28V o-p Full Scale with load resistors of 150ohm ( +/-1 % ) on HDY Output DAC and
300ohm ( +/-1 % ) on all other DACs when a 3.9kohm ( +/-1 % ) resistor is connected between IREF pin and ground.
MS0549-E-02
( 1 ) Input pin
( 2 ) Input Rate
The AK8823 equips 8Bit SD Input Port ( SD Port ) at SD Block, and 16Bit HD Input Port ( HD Port ) at HD Block.
SD Block operation sets NTSC / PAL mode, and with HD Video input, input signal types ( SD / ( 525i / 625i ) / ( 525p / 625p ) /
The AK8823 can output SD Video and HD Video signals simultaneously.
SD Port
HD Port
( 1080i/720p )
(ITU-R.BT 656)
525p/625p
Input Format
SD Port
HD Port
Video Mode
525i/625i
NTSC/PAL
1080i/720p
Input
SD Port
HD Port
HD Port
HD Port
525i/625i
HD Port
Input
SD Port
When video data on HD port is transferred to SD block, the same clock in CLK_HD pin must be fed to
DAC2
DAC 4
SDY
SDY
HDY
HDY
HDY
HDY
Y/CBCR 4:2:2
Y
CBCR 2:2
Format
4:2:2
Bit
16
8
Output
DAC 5
HDPB
HDPB
HDPB
HDPB
4
DAC3
SDC
SDC
CBCR7- CBCR0
DAC 6
HDPR
HDPR
HDPR
HDPR
74.25MHz
74.25MHz
27MHz
27MHz
ITU7-ITU0
Input Pins
CLK
Y7-Y0
HD block
SD block
14
DAC_CLOCK
27MHz
27MHz
Notes
148.5MHz ( CLK_HD x2 )
54MHz ( CLK_SD x2 )
54MHz ( CLK_HD x2 )
54MHz ( CLK_HD x2 )
DAC_CLOCK
[AK8823]
2006/10