kac-9638 ETC-unknow, kac-9638 Datasheet - Page 16

• Manufacturer Part Number: kac-9638
• Description: Kodak Kac-9638 Cmos Image Sensor
• Manufacturer: ETC-unknow

IMAGE SENSOR SOLUTIONS
Functional Description (continued)
6.3
The KAC-9638 contains a clock generation module (figure 26)
that will create three clocks as follows:
KAC-9638
www.kodak.com/go/imagers 585-722-4385
Hclk,
pclk
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5.50
5.00
4.50
4.00
3.50
3.00
2.50
2.00
1.50
1.00
Clock Generation
0
the horizontal clock. This is an internal system
clock and can be programmed to be the input
clock (mclk) or mclk divided by 1 or 2. All expo-
sure times are in multiples of this clock.
To set the frequency of this clock the HclkGen
bits in the VCLKGEN register should be pro-
gramed.
the pixel clock. This is the external pixel clock
that appears at the digital video port. By default
pclk is free running and it’s frequency is always
equal to Hclk (see figure 26).
pclk can be programmed to the following
modes:
• Data Ready Mode, where pclk clock will go
• Reverse Polarity Mode, where the polarity of
active every time a valid pixel appears on the
data out bus by setting the PixClkMode bit of
the DVBUSCONFIG1 to a logic 1.
pclk is negated by programming the PixClk-
Pol bit in the DVBUSCONFIG2 register.
16
32
Figure 25. Gain Plot with low light bit off
48
PGA Decimal Code
16
64
mclk
Figure 26. Clock Generation Module
80
PixClkMode
PixClkPol
data ready mode
÷
96
HclkGen
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mux
112
pclk
Hclk
128