sii1160 Silicon image, sii1160 Datasheet - Page 19

• Manufacturer Part Number: sii1160
• Description: Sii 1160 Panellink Transmitter
• Manufacturer: Silicon image

SiI 1160 PanelLink Transmitter
Data Sheet
TFT Panel Data Mapping
The following TFT data mapping tables are strictly listed for single link TFT applications only. For DSTN mapping
please refer to Application Note SiI-AN-0007-A. SiI 1151 and SiI 1161 have the same pinout.
For 18-bit mode, the Flat Panel Graphics Controller interfaces to the transmitter exactly the same as in the 24-bit
mode; however, 6 bits per channel (color) are used instead of 8. It is recommended that unused data bits be tied
low. As can be seen from the above table, the data mapping for less than 24-bit per pixel interfaces are MSB
justified. The data is sent during active display time while the control signals are sent during blank time. Note that
the three data channels (CH0, CH1, CH2) are mapped to Blue, Green and Red data respectively.
TFT VGA Output Tx Input Data Rx Output Data TFT Panel Input
24-bpp
HSYNC
VSYNC
Shift
CLK
G0
G1
G2
G3
G4
G5
G6
G7
DE
B0
B1
B2
B3
B4
B5
B6
B7
R0
R1
R2
R3
R4
R5
R6
R7
18-bpp
HSYNC HSYNC HSYNC HSYNC HSYNC HSYNC
VSYNC
Table 3. One Pixel/Clock Input/Output TFT Mode
Shift
CLK
G0
G1
G2
G3
G4
G5
DE
B0
B1
B2
B3
B4
B5
R0
R1
R2
R3
R4
R5
VSYNC VSYNC VSYNC VSYNC VSYNC
DIE10
DIE11
DIE12
DIE13
DIE14
DIE15
DIE16
DIE17
DIE18
DIE19
DIE20
DIE21
DIE22
DIE23
1160
IDCK
DIE0
DIE1
DIE2
DIE3
DIE4
DIE5
DIE6
DIE7
DIE8
DIE9
DE
IDCK
164
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
DE
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
15
ODCK
QE10
QE11
QE12
QE13
QE14
QE15
QE16
QE17
QE18
QE19
QE20
QE21
QE22
QE23
1161
QE0
QE1
QE2
QE3
QE4
QE5
QE6
QE7
QE8
QE9
DE
ODCK Shift CLK Shift CLK
141B
Q10
Q11
Q12
Q13
Q14
Q15
Q16
Q17
Q18
Q19
Q20
Q21
Q22
Q23
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
DE
24-bpp
DE
G0
G1
G2
G3
G4
G5
G6
G7
R0
R1
R2
R3
R4
R5
R6
R7
B0
B1
B2
B3
B4
B5
B6
B7
18-bpp
VSYNC
HSYNC
G0
G1
G2
G3
G4
G5
DE
B0
B1
B2
B3
B4
B5
R0
R1
R2
R3
R4
R5
SiI-DS-0126-B