sii1160 Silicon image, sii1160 Datasheet - Page 13

• Manufacturer Part Number: sii1160
• Description: Sii 1160 Panellink Transmitter
• Manufacturer: Silicon image

SiI 1160 PanelLink Transmitter
Data Sheet
Power Management Pins
Differential Signal Data Pins
Local Control (I
The transmitter can operate with or without an I
for details on using the I
EXT_SWING
Pin Name
Pin Name
Pin Name
ISEL/RST
TXC+
TX0+
TX1+
TX2+
TXC-
MSEN
TX0-
TX1-
TX2-
SDA
SCL
PD
Pin #
Pin #
40
39
43
42
46
45
35
34
32
Pin #
87
21
20
23
26
2
C) Interface
2
In/Out I
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
C registers.
Type Description
Type
Out
Type
In
In
In
I
inactive and chip configuration is taken from strap and default settings. This pin also acts
as an asynchronous reset to the I
LOW after a minimum T
Monitor Sense. The behavior of this output depends on whether the I
enabled or disabled.
This Receiver Sense function can only be used in DC-coupled systems.
Plug or Receiver Sense signal state, or can instead generate a status change interrupt for
those signals.
This pin is an open collector output. An external pull-up resistor (5KΩ recommended) is
required on this pin if the MSEN signal will be used. Otherwise the signal should be tied
low.
I
input. This pin is an open collector output. It must be pulled high to VCC through a
resistor; a value of 2.2KΩ is recommended for I
is not 5V-tolerant.
input and output. This pin is an open collector output. It must be pulled high to VCC
through a resistor; a value of 2.2KΩ is recommended for I
otherwise. This pin is not 5V-tolerant.
2
2
2
indicates power down mode. During power down mode, all data (DIE/DIO[23:0]), data
enable (DE), clock (IDCK) and control signals (HSYNC, VSYNC, CTL[3:1]), input buffers
are disabled, all output buffers are tri-stated and all internal circuitry is powered down.
When the I
register bit is used instead. Tie this pin low if not used.
TMDS Low Voltage Differential Signal input data pairs.
These pins are tri-stated when PD is asserted.
TMDS Low Voltage Differential Signal input clock pair.
These pins are tri-stated when PD is asserted.
the amplitude of the voltage swing. A smaller resistor value sets a larger voltage swing
and vice versa. For remote display applications with source termination, a 510Ω resistor
is recommended (see page 24). Without the source termination, use a 560Ω resistor.
Power Down (active LOW). A HIGH level indicates normal operation. A LOW level
Voltage Swing Adjust. A resistor should tie this pin to AVCC. This resistor determines
C Interface Select. If LOW, then the I
C Clock. When the I
C Data. When the I
No I
I
2
C enabled (ISEL = LOW)
2
C (ISEL = HIGH)
MSEN=HIGH: a powered on receiver is detected at the TMDS outputs.
MSEN=LOW: a powered on receiver is not detected.
The output is programmable through the I
2
C interface is enabled (ISEL/RST=LOW), this pin is ignored and the PD
2
C interface connection. Refer to the Feature Information section
2
2
C interface is enabled (ISEL=LOW), this pin acts as the I
C interface is enabled (ISEL=LOW), this pin acts as the I
RESET
9
high time resets the I
2
C interface controller. Switching this input from HIGH to
2
C interface is active. If HIGH, the interface is
Description
Description
2
C applications, 2-5KΩ otherwise. This pin
2
2
C interface and can indicate the Hot
C logic.
2
C applications, 2-5KΩ
2
C interface is
SiI-DS-0126-B
2
2
C data
C clock