k4j55323qi Samsung Semiconductor, Inc., k4j55323qi Datasheet - Page 24

• Manufacturer Part Number: k4j55323qi
• Description: 256mbit Gddr3 Sdram
• Manufacturer: Samsung Semiconductor, Inc.

K4J55323QI
7.9.2 READs
and bank addresses are provided with the READ command and auto precharge is either
enabled or disabled for that burst access. If auto precharge is enabled, the row being
accessed is precharged at the completion of the burst after t
the generic READ commands used in the following illustrations, auto precharge is dis-
abled.
be available following the CAS Latency after the READ command. Each subsequent
data-out element will be valid nominally at the next positive or negative strobe edge.
READ burst figure shows general timing for 2 of the possible CAS latency settings. The
GDDR3(x32) drives the output data edge aligned to the crossing of CK and /CK and to
RDQS. The initial HIGH transition LOW of RDQS is known as the read preamble ; the
half cycle coincident with the last data-out element is known as the read postamble.
will go High-Z. A detailed explanation of t
dow hold), the valid data window are depicted in Data Output Timing (1) figure. A
detailed explanation of t
Timing (2) figure.
command. A continuous flow of data can be maintained. The first data element from the
new burst follows the last element of a completed burst. The new READ command
should be issued x cycles after the first READ command, where x equals the number of
data element nibbles (nibbles are required by the 4n-prefetch architecture) depending
on the burst length. This is shown in consecutive READ bursts figure. Nonconsecutive
read data is shown for illustration in nonconsecutive READ bursts figure. Full-speed ran-
dom read accesses within a page (or pages) can be performed as shown in Random
READ accesses figure. Data from a READ burst cannot be terminated or truncated.
During READ commands the GDDR3 Dram disables its data terminators.
READ bursts are initiated with a READ command, as below figure. The starting column
Upon completion of a burst, assuming no other commands have been initiated, the DQs
During READ bursts, the valid data-out element from the starting column address will
Data from any READ burst may be concatenated with data from a subsequent READ
AC
(DQS and DQ transition skew to CK) is shown in Data Output
DQSQ
(valid data-out skew), t
RAS(min)
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has been met. For
DV
(data-out win-
A0-A7, A9
256M GDDR3 SDRAM
A10, A11
BA0, BA1
/RAS
/CAS
/WE
/CS
CKE
A8
/CK
CK
CA = Column Address
BA = Bank Address
EN AP = Enable Auto Precharge
DIS AP = Disable Auto Precharge
Rev. 1.3 May 2007
READ Command
HIGH
DON’T CARE
DIS AP
EN AP
CA
BA