cx20493-35/app Conexant Systems, Inc., cx20493-35/app Datasheet - Page 84

• Manufacturer Part Number: cx20493-35/app
• Description: With Cx20493 Smartdaa?
• Manufacturer: Conexant Systems, Inc.

5.2.4
5-6
CX81801-7x/8x SmartV.XX Modem in 128-Pin LQFP with CX20493 in 32-Pin LQFP Data Sheet
LCR - Line Control Register (Addr = 3)
The Line Control Register (LCR) specifies the format of the asynchronous data
communications exchange.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bits 1-0
This bit must be set to a 1 to access the Divisor latch registers during a read or write
When bit 6 is a 1, the transmit data is forced to the break condition, i.e., space (0) is
When parity is enabled (LCR3 = 1) and stick parity is selected (LCR5 = 1), the parity
When parity is enabled (LCR3 = 1) and stick parity is not selected (LCR5 = 0), the
When bit 3 is a 1, a parity bit is generated in the serial out (transmit) data stream and
This bit specifies the number of stop bits in each serial out character. If bit 2 is a 0, one
These two bits specify the number of bits in each serial in or serial out character. The
operation. It must be reset to a 0 to access the Receiver Buffer, the Transmitter Buffer,
or the Interrupt Enable Register.
sent. When bit 6 is a 0, break is not sent. The Set Break bit acts only on the transmit
data and has no effect on the serial in logic.
bit is transmitted and checked by the receiver as a 0 if even parity is selected (LCR4 =
1) or as a 1 if odd parity is selected (LCR4 = 0). When stick parity is not selected
(LCR3 = 0), parity is transmit and checked as determined by the LCR3 and LCR4 bits.
number of 1s transmitted or checked by the receiver in the data word bits and parity bit
is either even (LCR4 = 1) or odd (LCR4 = 0).
checked in the serial in (receive) data stream as determined by the LCR 4 and LCR5
bits. The parity bit is located between the last data bit and the first stop bit.
stop bit is generated regardless of word length. If bit 2 is a 1 and 5-bit word length is
selected, one and one-half stop bits are generated. If bit 2 is a 1 and a 6-, 7-, or 8-bit
word length is selected, two stop bits are generated. The serial in logic checks the first
stop bit only, regardless of the number of stop bits selected.
encoding of bits 0 and 1 is:
Bit 1
0
0
1
1
Divisor Latch Access Bit (DLAB).
Set Break.
Stick Parity.
Even Parity Select (EPS).
Enable Parity (PEN).
Number of Stop Bits (STB).
Word Length Select (WLS0 and WLS1).
Bit 0
0
1
0
1
5 Bits (Not supported)
6 Bits (Not supported)
Conexant
Word Length
7 Bits
8 Bits
102247B