cxd3220r Sony Electronics, cxd3220r Datasheet - Page 53

• Manufacturer Part Number: cxd3220r
• Description: Ieee1394 Link/transaction Layer Controller Lsi For Sbp-2
• Manufacturer: Sony Electronics

CXD3220R
Mode1) Page_table_present (p) = 0, Page_size = non-zero, Use page boundary
When page_table_present (p) = 0 and page_size = non-zero are set, the ADP enters a transfer mode in which
there are restrictions on address boundary. In this case, since the address of the initiator is directly indicated in
the data_descriptor obtained with the normal command block ORB, set the node_ID & offset_hi & offset_lo of
the data_descriptor to the Destination ID & destinationOffsetHigh & destinationOffsetLow of the ADP register.
Also set d, spd, max_payload, p, page_size and data_size. ADP transfer starts when the ADPgo bit of the
Command register is set to "1".
The transfer speed of request packets generated with the ADP is selected between either S100 for spd = 0 or
S200 for spd = 1.
In this mode, there is a restriction in the form of an address boundary in which data must not be transferred
across this address. The address boundary is the address where the 1394 serial bus address lower
(page_size + 8) bits change from all "1" to all "0".
Thus, transmission and reception of data that is larger than the corresponding data_size represented with
max_payload or data that crosses the address boundary are performed by dividing the packet.
The following page indicates a summary of packetizing with respect to this mode.
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