cxd3220r Sony Electronics, cxd3220r Datasheet - Page 44
cxd3220r
Manufacturer Part Number
cxd3220r
Description
Ieee1394 Link/transaction Layer Controller Lsi For Sbp-2
Manufacturer
Sony Electronics
Datasheet
1.CXD3220R.pdf
(65 pages)
- Current page: 44 of 65
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7. ADP (Asynchronous Data Pipe)
The CXD3220R is equipped with a function referred to as ADP for automatically transmitting and receiving the
data of computer peripherals in the form of Asynchronous packets based on the SBP-2 protocol.
A dedicated I/O data bus and several control signal pins are used to perform exchange of data with the
decoder/encoder of various systems (see below).
This function also supports the transport data I/F compatible with both 8-bit and 16-bit data.
7-1. Built-in FIFO
The CXD3220R is equipped with a built-in dedicated FIFO for SBP2 data transfer.
There are two types of FIFO: a large-capacity FIFO_A and a small-capacity FIFO_B. The capacity of FIFO_A
is 532 quadlets, and is able to contain two 1 KB Asynchronous packets. The capacity of the FIFO_B is 12
quadlets.
Use the CXD3220R with a maximum Asynchronous packet size of 1024 bytes.
SD
XHWR
XHRD
SDRQ
XSAC
Name
Width
16
1
1
1
1
Output
Input
Input
Input
I/O
I/O
Data bus
Data write strobe signal
Data read strobe signal
Data request signal
Acknowledge signal for SDRQ
– 44 –
Description
CXD3220R
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