cxd3220r Sony Electronics, cxd3220r Datasheet - Page 24
cxd3220r
Manufacturer Part Number
cxd3220r
Description
Ieee1394 Link/transaction Layer Controller Lsi For Sbp-2
Manufacturer
Sony Electronics
Datasheet
1.CXD3220R.pdf
(65 pages)
- Current page: 24 of 65
- Download datasheet (414Kb)
17) TEST Mode Registers
These registers are used to control the test mode of the CXD3220R.
They are normally set to 0000_0000h.
The register address is 44h and the initial value is 0000_0000h. Do not write in this register.
18) ATFWrite (first quadlet of the packet) Registers
The first quadlet of the transmitted Asynchronous packet is written in these registers.
The register address is 70h and the initial value is 0000_0000h.
19) ATFWrite/ARFRead Registers
The second through the next to the last quadlets of the transmitted Asynchronous packet are written in these
registers. Also, the Asynchronous packet read from the ARF during receive is written one quadlet at a time.
The register address is 74h and the initial value is 0000_0000h.
20) ATFWrite (confirm write) Registers
The last quadlet of the transmitted Asynchronous packet is written in these registers.
The register address is 7Ch and the initial value is 0000_0000h.
31 to 0
31 to 0
31 to 0
Bit
Bit
Bit
ATFWrite
(first quadlet of
ATFWrite
/ARFRead
ATFWrite
(confirm write)
the packet)
Name
Name
Name
Writes the first quadlet of the transmitted Asynchronous packet.
Transmit: Writes the second through the next to the last quadlets of the
Receive: Reads one quadlet at a time for the Asynchronous packet read
Writes the last quadlet of the transmitted Asynchronous packet.
transmitted Asynchronous packet.
from ARF.
– 24 –
Function
Function
Function
CXD3220R
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