lxt971a Intel Corporation, lxt971a Datasheet - Page 75

• Manufacturer Part Number: lxt971a
• Description: 3.3v Dual-speed Fast Ethernet Phy Transceiver
• Manufacturer: Intel Corporation

Datasheet
Document #: 249414
Revision #: 002
Rev. Date: August 7, 2002
Table 44. MII Status Register #1 (Address 1)
1. RO = Read Only
1.15
1.14
1.13
1.12
1.10
1.11
Bit
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
LL = Latching Low
LH = Latching High
100BASE-T4
Not Supported
100BASE-X Full-Duplex
100BASE-X Half-Duplex
10 Mbps Full-Duplex
10 Mbps Half-Duplex
100BASE-T2 Full-
Duplex
Not Supported
100BASE-T2 Half-
Duplex
Not Supported
Extended Status
Reserved
MF Preamble
Suppression
Auto-Negotiation
complete
Remote Fault
Auto-Negotiation Ability
Link Status
Jabber Detect
Extended Capability
Name
1 = PHY able to perform 100BASE-T4
0 = PHY not able to perform 100BASE-T4
1 = PHY able to perform full-duplex 100BASE-X
0 = PHY not able to perform full-duplex 100BASE-X
1 = PHY able to perform half-duplex 100BASE-X
0 = PHY not able to perform half-duplex 100BASE-X
1 = PHY able to operate at 10 Mbps in full-duplex
mode
0 = PHY not able to operate at 10 Mbps full-duplex
mode
1 = PHY able to operate at 10 Mbps in half-duplex
mode
0 = PHY not able to operate at 10 Mbps in half-
duplex
1 = PHY able to perform full-duplex 100BASE-T2
0 = PHY not able to perform full-duplex 100BASE-T2
1 = PHY able to perform half-duplex 100BASE-T2
0 = PHY not able to perform half-duplex 100BASE-
T2
1 = Extended status information in register 15
0 = No extended status information in register 15
1 = ignore when read
1 = PHY accepts management frames with
preamble suppressed
0 = PHY will not accept management frames with
preamble suppressed
1 = Auto-negotiation complete
0 = Auto-negotiation not complete
1 = Remote fault condition detected
0 = No remote fault condition detected
1 = PHY is able to perform auto-negotiation
0 = PHY is not able to perform auto-negotiation
1 = Link is up
0 = Link is down
1 = Jabber condition detected
0 = Jabber condition not detected
1 = Extended register capabilities
0 = Basic register capabilities
LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver
Description
RO/LH
RO/LH
Type
RO/LL
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
1
Default
0
1
1
1
1
0
0
0
0
0
0
0
1
0
0
1
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