lxt971a Intel Corporation, lxt971a Datasheet - Page 30

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lxt971a

Manufacturer Part Number
lxt971a
Description
3.3v Dual-speed Fast Ethernet Phy Transceiver
Manufacturer
Intel Corporation
Datasheet

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LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver
3.4.5
30
Figure 8. Hardware Configuration Settings
Table 9.
Hardware Configuration Settings
The LXT971A provides a hardware option to set the initial device configuration. The hardware
option uses the three LED driver pins. This provides three control bits, as listed in
LED drivers can operate as either open-drain or open-source circuits as shown in
Hardware Configuration Settings
Disabled
Enabled
1. Refer to
Auto-
Neg
Desired Mode
(Mbps)
10/100
Speed
Table 7 on page 19
Only
100
100
10
Duplex
Full or
Only
Half
Half
Half
Half
Half
Full
Full
Full
LED/CFG Pin
1. The LED/CFG pins automatically adjust their
2. Unused LEDs may be implemented with pull-up/
LED/CFG Pin
polarity upon power-up or reset.
pull-down resistors of 10 K.
High
High
High
High
Low
Low
Low
Low
for LED/CFG pin assignments.
1
Pin Settings
LED/CFGn
High
High
High
High
Low
Low
Low
Low
2
Configuration Bit = 1
Configuration Bit = 0
High
High
High
High
Low
Low
Low
Low
1
3
Auto-
Neg
0.12
0
1
Control Register
Speed
0.13
3.3 V
0
1
1
Resulting Register Bit Values
0.8
FD
0
1
0
1
0
1
0
1
AN Advertisement Registers
100FD
4.8
0
1
0
1
Auto-Negotiation Adver-
Rev. Date: August 7, 2002
100TX
tisement
Figure
4.7
Document #: 249414
1
1
1
1
Table
N/A
Revision #: 002
Datasheet
10FD
9. The
8.
4.6
0
0
0
1
10T
4.5
0
0
1
1

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