lxt971a Intel Corporation, lxt971a Datasheet - Page 34

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lxt971a

Manufacturer Part Number
lxt971a
Description
3.3v Dual-speed Fast Ethernet Phy Transceiver
Manufacturer
Intel Corporation
Datasheet

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LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver
3.6.7
34
Figure 10. 10BASE-T Clocking
Figure 11. 100BASE-X Clocking
Figure 12. Link Down Clock Transition
Loopback
The LXT971A provides two loopback functions, operational and test (see
paths are shown in
TX_CLK
(Sourced by LXT971A)
RX_CLK
(Sourced by LXT971A)
XI
TX_CLK
(Sourced by LXT971A)
RX_CLK
(Sourced by LXT971A)
XI
RX_CLK
TX_CLK
Figure
Any Clock
13.
Clock transition time will not exceed
2X the nominal clock period:
10 Mbps = 2.5 MHz
100 Mbps = 25 MHz
2.5 MHz during auto-negotiation
2.5 MHz during auto-negotiation
2.5 MHz during auto-negotiation and 10BASE-T Data & Idle
2.5 MHz during auto-negotiation and 10BASE-T Data & Idle
x
Link-Down Condition/Auto-Negotiate Enabled
x
Constant 25 MHz
Constant 25 MHz
2.5 MHz Clock
25 MHz once 100BASE-X
25 MHz once 100BASE-X
Link Established
Link Established
Table
Rev. Date: August 7, 2002
10). Loopback
Document #: 249414
Revision #: 002
Datasheet

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