lxt971a Intel Corporation, lxt971a Datasheet - Page 62

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lxt971a

Manufacturer Part Number
lxt971a
Description
3.3v Dual-speed Fast Ethernet Phy Transceiver
Manufacturer
Intel Corporation
Datasheet

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LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver
62
Figure 29. 100BASE-TX Transmit Timing - 4B Mode
Table 30. 100BASE-TX Transmit Timing Parameters
TXD<3:0>, TX_EN, TX_ER setup to
TX_CLK High
TXD<3:0>, TX_EN, TX_ER hold from
TX_CLK High
TX_EN sampled to CRS asserted
TX_EN sampled to CRS de-asserted
TX_EN sampled to TPFO out (Tx
latency)
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production
2. BT is the duration of one bit as transferred to and from the MAC and is the reciprocal of the bit rate.
testing.
100BASE-T bit time = 10
TXD<3:0>
TXCLK
TX_EN
TPFO
Parameter
CRS
0ns
-8
s or 10 ns.
t3
t5
Symbol
t2
t1
t1
t2
t3
t4
t5
Min
5.3
12
20
24
0
-
4B Mode
Typ
1
Max
5.7
24
28
t4
250ns
Units
BT
BT
BT
ns
ns
2
Rev. Date: August 7, 2002
Document #: 249414
Test Conditions
Revision #: 002
Datasheet

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