IDT70V9269L15PRFI IDT [Integrated Device Technology], IDT70V9269L15PRFI Datasheet - Page 2

• Manufacturer Part Number: IDT70V9269L15PRFI
• Description: HIGH-SPEED 3.3V 32K x 16 SYNCHRONOUS DUAL-PORT STATIC RAM
• Manufacturer: IDT [Integrated Device Technology]

Description:
Dual-Port RAM. The memory array utilizes Dual-Port memory cells to
allow simultaneous access of any address from both ports. Registers on
control, data, and address inputs provide minimal setup and hold times.
The timing latitude provided by this approach allows systems to be
designed with very short cycle times.
Pin Configuration
NOTES:
1. A
2. All V
3. All V
4. Package body is approximately 14mm x 20mm x 1.4mm.
5. This package code is used to reference the package diagram.
6. This text does not indicate orientation of the actual part-marking.
IDT70V9279/69S/L
High-Speed 32/16K x 16 Dual-Port Synchronous Static RAM
The IDT70V9279/69 is a high-speed 32/16K x 16 bit synchronous
14
X
DD
SS
is a NC for IDT70V9269.
pins must be connected to power supply.
pins must be connected to ground.
CNTEN
CNTEN
ADS
CLK
ADS
CLK
N/C
N/C
N/C
N/C
A
A
A
A
A
A
A
A
A
A
N/C
N/C
N/C
N/C
N/C
V
A
N/C
V
A
A
A
A
A
A
A
A
A
9R
8R
7R
6R
5R
4R
3R
2R
1R
0R
DD
SS
2L
8L
9L
0L
1L
3L
4L
5L
6L
7L
R
R
01/15/04
R
L
L
L
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
(2,3,4)
70V9279/69PRF
128-Pin TQFP
Top View
PK-128
6.42
2
(5)
(6)
applications having unidirectional or bidirectional data flow in bursts. An
automatic power down feature, controlled by CE
on-chip circuitry of each port to enter a very low standby power mode.
Fabricated using IDT’s CMOS high-performance technology, these
devices typically operate on only 429mW of power.
With an input data register, the IDT70V9279/69 has been optimized for
Industrial and Commercial Temperature Ranges
101
102
100
85
82
78
76
74
99
98
97
96
95
94
93
92
91
90
89
88
87
86
84
83
81
80
79
77
75
73
72
71
70
69
68
67
66
65
3743 drw 02
I/O
I/O
V
N/C
I/O
N/C
N/C
I/O
V
I/O
I/O
I/O
V
I/O
V
I/O
I/O
I/O
V
I/O
I/O
V
I/O
I/O
V
I/O
I/O
I/O
I/O
V
N/C
N/C
I/O
N/C
I/O
I/O
V
V
DD
SS
DD
SS
DD
SS
SS
DD
SS
DD
10R
9R
8R
7R
6R
5R
4R
3R
2R
1R
0R
0L
1L
2L
3L
4L
5L
6L
7L
8L
9L
10L
0
and CE
1,
permits the