lrs1830 Sharp Microelectronics of the Americas, lrs1830 Datasheet - Page 55

• Manufacturer Part Number: lrs1830
• Description: Stacked Chip 256m X16 Boot Block Flash And 32m X16 Scram
• Manufacturer: Sharp Microelectronics of the Americas

Write Cycle Timing Chart 3 (WE Controlled))
Notes:
1. During address transition, at least one of SC-CE
2. Do not input data to the DQ pins while they are in the output state.
3. In write cycle, SC-CE
4. Write operation is done during the overlap time of a low level SC-CE
Address
SC-CE
sharp
D
D
WE
UB
OE
LB
OUT
IN
1
V
V
V
V
V
V
V
V
V
V
V
V
V
V
OH
IH
IH
IH
IH
IH
IH
IL
IL
IL
IL
IL
OL
IL
t
OHAH
t
2
OES
High - Z
and OE should be fixed to high level.
t
AS
ADDRESS STABLE
t
WHZ
t
AW
t
t
WC
WP
VALID INPUT
t
DW
1
, WE or LB, UB pins should be inactivated.
L R S1 8 3 0
t
WR
t
DH
t
BHAH
t
WHP
High - Z
t
AS
1
ADDRESS STABLE
, WE, LB and/or UB.
t
AW
t
t
WC
WP
VALID INPUT
t
DW
t
WR
t
t
DH
OW
t
t
OEH
BHAH
High - Z
t
ASO
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