lrs1830 Sharp Microelectronics of the Americas, lrs1830 Datasheet - Page 18

• Manufacturer Part Number: lrs1830
• Description: Stacked Chip 256m X16 Boot Block Flash And 32m X16 Scram
• Manufacturer: Sharp Microelectronics of the Americas

6.3 Register Definition
SR.15 - SR.8 = RESERVED FOR FUTURE
SR.0 =RESERVED FOR FUTURE ENHANCEMENTS (R)
SR.7 = WRITE STATE MACHINE STATUS (WSMS)
SR.4 = (PAGE BUFFER) PROGRAM STATUS (PBPS)
SR.2 = (PAGE BUFFER) PROGRAM SUSPEND
SR.1 = DEVICE PROTECT STATUS (DPS)
SR.6 = BLOCK ERASE SUSPEND STATUS (BESS)
SR.5 = BLOCK ERASE AND BANK ERASE
SR.3 = WP/A
WSMS
1 = Ready
0 = Busy
1 = Block Erase Suspended
0 = Block Erase in Progress/Completed
1 = Error in Block Erase or Bank Erase
0 = Successful Block Erase or Bank Erase
1 = Error in (Page Buffer) Program
0 = Successful (Page Buffer) Program
1 = 3.1V < WP/ACC < 11.7V Detect,
0 = WP/A
1 = (Page Buffer) Program Suspended
0 = (Page Buffer) Program in Progress/Completed
1 = Erase or Program Attempted on a
0 = Unlocked
sharp
15
R
7
STATUS (BEFCES)
Operation Abort
STATUS (PBPSS)
Locked Block, Operation Abort
CC
CC
ENHANCEMENTS (R)
STATUS (WPACCS)
OK
BESS
14
R
6
BEFCES
13
R
5
Status Register Definition
PBPS
12
R
4
L R S1 8 3 0
Notes:
Status Register indicates the status of the partition, not WSM
(Write State Machine). Even if the SR.7 is “1”, the WSM may
be occupied by the other partition when the device is set to 2, 3
or 4 partitions configuration.
Check SR.7 or F-RY/BY to determine block erase, bank erase,
(page buffer) program completion. SR.6 - SR.1 are invalid
while SR.7= “0”.
If both SR.5 and SR.4 are “1”s after a block erase, bank erase,
(page buffer) program, set/clear block lock bit, set block lock-
down bit or set partition configuration register attempt, an
improper command sequence was entered.
SR.3 does not provide a continuous indication of WP/A
level. The WSM interrogates and indicates the WP/A
only after Block Erase, Bank Erase, (Page Buffer) Program
command sequences. SR.3 is not guaranteed to report accurate
feedback when WP/A
SR.1 does not provide a continuous indication of block lock
bit. The WSM interrogates the block lock bit only after Block
Erase, Bank Erase, (Page Buffer) Program command
sequences. It informs the system, depending on the attempted
operation, if the block lock bit is set. Reading the block lock
configuration codes after writing the Read Identifier Codes
command indicates block lock bit status.
SR.15 - SR.8, SR.3 and SR.0 are reserved for future use and
should be masked out when polling the status register.
WPACCS
11
R
3
PBPSS
CC
10
R
2
V
ACCH1/2
.
DPS
R
9
1
R
R
CC
8
0
level
CC
15