lrs1830 Sharp Microelectronics of the Americas, lrs1830 Datasheet - Page 11

• Manufacturer Part Number: lrs1830
• Description: Stacked Chip 256m X16 Boot Block Flash And 32m X16 Scram
• Manufacturer: Sharp Microelectronics of the Americas

6. Flash Memory 1, 2
6.1 Truth Table
6.1.1 Bus Operation
Notes:
Read
Output Disable
Write
Standby
Reset Power Down
1. L = V
2. Command writes involving block erase, (page buffer) program are reliably executed when WP/A
3. Never hold OE low and WE low at the same timing.
4. Refer to Section 6.2 Command Definitions for Flash Memory valid D
5. WP/A
6. Electricity consumption of Flash Memory is lowest when F-RST = GND ±0.2V.
7. Never hold F
8. Flash Read Mode
Read Array
Read Identifier Codes
Read Query
V
Command writes involving bank erase is reliably executed when WP/A
Block erase, bank erase, (page buffer) program with WP/A
be attempted.
sharp
CC
= 2.7V to 3.1V.
IL
CC
, H = V
Flash
Mode
set to V
1
-CE low and F
(1)
IH
IL
, X = H or L, High-Z = High impedance. Refer to the DC Characteristics.
or V
IH
.
2
-CE low at the same timing.
Refer to the Appendix
2,3,4,5
Notes
3,5
5,6
5
5
See 6.2.2
Address
X
F-CE
H
X
L
L R S1 8 3 0
Refer to the Appendix
CC
F-RST
< V
H
H
DQ
L
See 6.2.2
ACCH1/2
0
D
to DQ
OUT
IN
during a write operation.
CC
15
(Min.) produce spurious results and should not
= V
OE
H
X
L
ACCH1
and V
WE
H
X
L
CC
= 2.7V to 3.1V.
CC
DQ
= V
High - Z
High - Z
0
D
to DQ
(8)
ACCH1/2
IN
15
and
8