emc2104 Standard Microsystems Corp., emc2104 Datasheet - Page 80

• Manufacturer Part Number: emc2104
• Description: Emc2104 Dual Rpm-based Pwm Fan Controller With Hardware Thermal Shutdown
• Manufacturer: Standard Microsystems Corp.

ADDR
ADDR
ADDR
E1h
E3h
E2
Revision 1.74 (05-08-08)
6.36
6.37
6.38
R/W
R/W
R/W
R/W
R/W
R
The GPIO Direction Register 1 controls the direction of GPIOs 1 through 6. When muxable pins are
not configured as a GPIO ports the respective bits are ignored.
Bit 5 - 0 - GPIOx_DIR - Controls the input / output state of GPIOs. The bit is not used if the pin is not
configured as a GPIO.
The GPIO Output Configuration Register controls the output pin type of each GPIO pin. These settings
apply to the pin if it is configured as a GPIO output or a PWM. Bit 6 - PWM1_OT - Determines the
output type for the PWM1 pin.
Bit 2 - 0 - GPIOx_OT - Determines the output type for GPIOx.
The GPIO Input Register indicates the state of the corresponding GPIO pin regardless of the
functionality of the pin (GPIO, PWM, or TACH) or the direction of the GPIO (input, push-pull output,
open-drain output). When a GPIO is configured as an input, any change of state will assert the
ALERT# pin (unless GPIO interrupts are masked, see
GPIO Direction Register
GPIO / PWM Pin Output Configuration Register
GPIO Input Register
‘0’ (default) - The GPIO is configured as an input.
‘1’ - The GPIO is configured as an output.
‘0’ (default) - The PWM1 output is configured as an open drain output (if enabled as a PWM
output).
‘1’ - The PWM1 output is configured as a push-pull output (if enabled as an a PWM output).
‘0’ (default) - GPIOx is configured as an open drain output (if enabled as an output).
‘1’ - GPIOxis configured as a push-pull output (if enabled as an output).
REGISTER
REGISTER
REGISTER
GPIO Input
Direction 1
Output
Config
GPIO
GPIO
Table 6.54 GPIO / PWM Pin Output Configuration Register
B7
B7
B7
-
-
-
Table 6.53 GPIO Direction Register
Table 6.55 GPIO Input Register
1_OT
PWM
B6
B6
B6
-
-
DATASHEET
Dual RPM-Based PWM Fan Controller with Hardware Thermal Shutdown
B5
B5
B5
-
-
-
80
B4
B4
B4
-
-
-
Section
B3
B3
B3
-
-
-
6.15).
3_DIR
GPIO
3_OT
GPIO
GPIO
3_IN
B2
B2
B2
2_DIR
GPIO
2_OT
GPIO
GPIO
2_IN
B1
B1
B1
1_DIR
GPIO
1_OT
GPIO
GPIO
1_IN
B0
B0
B0
SMSC EMC2104
Datasheet
DEFAULT
DEFAULT
DEFAULT
00h
00h
00h