emc2104 Standard Microsystems Corp., emc2104 Datasheet - Page 73

• Manufacturer Part Number: emc2104
• Description: Emc2104 Dual Rpm-based Pwm Fan Controller With Hardware Thermal Shutdown
• Manufacturer: Standard Microsystems Corp.

Dual RPM-Based PWM Fan Controller with Hardware Thermal Shutdown
Datasheet
SMSC EMC2104
6.29
6.30
ADDR
ADDR
4Ch
4Dh
8Ch
8Dh
4Ah
4Bh
8Ah
8Bh
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
The Fan Drive Fail Band Registers store the number of tach counts used by the Fan Drive Fail
detection circuitry. This circuitry is activated when the fan drive setting high byte is at FFh. When it is
enabled, the actual measured fan speed is compared against the target fan speed. These registers
are only used when the FSC is active.
This circuitry is used to indicate that the target fan speed at full drive is higher than the fan is actually
capable of reaching. If the measured fan speed does not exceed the target fan speed minus the Fan
Drive Fail Band Register settings for a period of time longer than set by the DRIVE_FAIL_CNTx[1:0]
bits then the DRIVE_FAIL status bit will be set and an interrupt generated.
The TACH Target Registers hold the target tachometer value that is maintained each of the RPM based
Fan Speed Control Algorithms.
The value in the TACH Target Registers will always reflect the current TACH Target value. If the Look
Up Table is active and configured to operate in RPM Mode, then this register will be read only. Writing
to this register will have no affect and the data will not be stored.
Fan Drive Fail Band Registers
TACH Target Registers
R
TACH Target
TACH Target
TACH Target
TACH Target
Fan 1 Drive
Fan 2 Drive
1 High Byte
2 High Byte
REGISTER
REGISTER
1 Low Byte
2 Low Byte
Fan 1 Drive
Fan 2 Drive
High Byte
High Byte
Fail Band
Fail Band
Fail Band
Fall Band
Low Byte
Low Byte
Table 6.44 Fan Drive Fail Band Registers
4096
4096
4096
4096
Table 6.45 TACH Target Registers
B7
B7
16
16
16
16
2048
2048
2048
2048
B6
B6
DATASHEET
8
8
8
8
1024
1024
1024
1024
B5
B5
73
4
4
4
4
512
512
512
512
B4
B4
2
2
2
2
256
256
256
256
B3
B3
1
1
1
1
128
128
128
128
B2
B2
-
-
-
-
B1
B1
64
64
64
64
-
-
-
-
Revision 1.74 (05-08-08)
B0
B0
32
32
32
32
-
-
-
-
DEFAULT
DEFAULT
F8h
FFh
F8h
FFh
00h
00h
00h
00h