emc2104 Standard Microsystems Corp., emc2104 Datasheet - Page 59

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emc2104

Manufacturer Part Number
emc2104
Description
Emc2104 Dual Rpm-based Pwm Fan Controller With Hardware Thermal Shutdown
Manufacturer
Standard Microsystems Corp.
Datasheet

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Dual RPM-Based PWM Fan Controller with Hardware Thermal Shutdown
Datasheet
APPLICATION NOTE: If any of the External Diode 1, 2, or 3 channels are configured as a voltage input and
SMSC EMC2104
6.13
6.13.1
R/W
R-C
R-C
R-C
R-C
Bit 1- LOW - This bit is set to ‘1’ if any bit in the Low Status Register is set. This bit is automatically
cleared when the Low Status Register is read and the bits are cleared.
Bit 0 - FAULT - This bit is set to ‘1’ if any bit in the Diode Fault Register is set. This bit is automatically
cleared when the Diode Fault Register is read and the bits are cleared.
The Error Status Registers report the specific error condition for all measurement channels with limits.
If any bit is set in the High, Low, or Diode Fault Status register, the corresponding High, Low, or Fault
bit is set in the Interrupt Status Register.
Reading the Interrupt Status Register does not clear the Error Status bit. Reading from any Error Status
Register that has bits set will clear the register and the corresponding bit in the Interrupt Status
Register if the error condition has been removed. If the error condition is persistent, reading the Error
Status Registers will have no affect.
If any of the External Diode 1, External Diode 2, or External Diode 3 channels are configured as a
voltage input, then the corresponding temperature channel status bit will be set if the measured voltage
exceeds the high limit or falls below the low limit. In this condition, a diode fault will be ignored.
Tcrit Status Register
The Tcrit Status Register stores the event that caused the SYS_SHDN# pin to be asserted. Each of
the temperature channels must be associated with the SYS_SHDN# pin before they can be set (see
Section
below the threshold level however the individual status bit will not be cleared until read.
Bit 7 - HWS - This bit is set if the hardware set temperature channel meets or exceeds the temperature
threshold determined by the TRIP_SET voltage.
Error Status Registers
High Status
Diode Fault
REGISTER
Tcrit Status
Low Status
6.8). Once the SYS_SHDN# pin is asserted, it will be released when the temperature drops
thermistor or other voltage source is used on the corresponding pins at device power up,
then the corresponding diode fault status bits will be set. The status bits should be cleared
prior to enabling the interrupts to avoid erroneous alert conditions.
HWS
B7
-
-
-
Table 6.18 Error Status Register
B6
-
-
-
-
DATASHEET
VOLT
VOLT
4_LO
4_HI
B5
-
-
59
EXT4_
EXT4_
EXT4_
EXT4_
CRIT
FLT
LO
B4
HI
EXT3_
EXT3_
EXT3_
EXT3_
CRIT
FLT
B3
LO
HI
EXT2_
EXT2_
EXT2_
EXT2_
CRIT
FLT
B2
LO
HI
_CRIT
EXT1
EXT1
EXT1
EXT1
_FLT
_LO
_HI
B1
Revision 1.74 (05-08-08)
INT_L
CRIT
INT_
INT_
B0
HI
O
-
DEFAULT
00h
00h
00h
00h

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