emc2104 Standard Microsystems Corp., emc2104 Datasheet - Page 70

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emc2104

Manufacturer Part Number
emc2104
Description
Emc2104 Dual Rpm-based Pwm Fan Controller With Hardware Thermal Shutdown
Manufacturer
Standard Microsystems Corp.
Datasheet

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Revision 1.74 (05-08-08)
0
0
1
1
2
0
0
0
0
1
1
1
1
Bit 5 - NOKICKx - Determines if the Spin Up Routine will drive the fan to 100% duty cycle for 1/4 of
the programmed spin up time before driving it at the programmed level.
Bits 4 - 2 - SPIN_LVL[2:0] - Determines the final drive level that is used by the Spin Up Routine as
shown in
Bit 1 -0 - SPINUP_TIME[1:0] - determines the maximum Spin Time that the Spin Up Routine will run
for (see
elapsed, then an interrupt will be generated. When the RPM based Fan Speed Control Algorithm is
active, the fan driver will attempt to re-start the fan immediately after the end of the last spin up attempt.
The Spin Time is set as shown in
1
‘0’ (default) - The Spin Up Routine will drive the fan driver to 100% for 1/4 of the programmed spin
up time before reverting to the programmed spin level.
‘1’ - The Spin Up Routine will not drive the fan driver to 100%. It will set the drive at the
programmed spin level for the entire duration of the programmed spin up time.
DRIVE_FAIL_CNT[1:0]
Section
Table
6.39.
SPIN_LVL[2:0]
6.9). If a valid tachometer measurement is not detected before the Spin Time has
0
1
0
1
Table 6.38 DRIVE_FAIL_CNT[1:0] Bit Decode
1
0
0
1
1
0
0
1
1
0
Table 6.39 Spin Level
Table
DATASHEET
Dual RPM-Based PWM Fan Controller with Hardware Thermal Shutdown
6.40.
70
Disabled - the Drive Fail detection circuitry is
disabled (default)
16 - the Drive Fail detection circuitry will count for 16
update periods
32 - the Drive Fail detection circuitry will count for 32
update periods
64 - the Drive Fail detection circuitry will count for 64
update periods
0
0
1
0
1
0
1
0
1
NUMBER OF UPDATE PERIODS
SPIN UP DRIVE LEVEL
60% (default)
30%
35%
40%
45%
50%
55%
65%
SMSC EMC2104
Datasheet

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