emc2104 Standard Microsystems Corp., emc2104 Datasheet - Page 65

• Manufacturer Part Number: emc2104
• Description: Emc2104 Dual Rpm-based Pwm Fan Controller With Hardware Thermal Shutdown
• Manufacturer: Standard Microsystems Corp.

ADDR
Dual RPM-Based PWM Fan Controller with Hardware Thermal Shutdown
Datasheet
SMSC EMC2104
42h
82h
6.22
R/W
R/W
R/W
The PWM 1 and 2 Divide Registers determine the final frequency of the PWM 1and PWM 2 drivers.
Each driver base frequency is divided by the value of the respective PWM Divide Register to determine
the final frequency. The duty cycle settings are not affected by these settings, only the final frequency
of the PWM driver. A value of 00h will be decoded as 01h.
The Fan Configuration 1 Register controls the general operation of the RPM based Fan Speed Control
Algorithm used for the Fan 1 driver.
Bit 7 - EN_ALGO - enables the RPM based Fan Speed Control Algorithm. This bit is set and cleared
automatically when the LUT_LOCK bit is set based on the setting of the TACH / DRIVE bit (see
Section
using the Look Up Table.
Bits 6- 5 - RANGE[1:0] - Adjusts the range of reported and programmed tachometer reading values.
The RANGE bits determine the weighting of all TACH values (including the Valid TACH Count, TACH
Target, and TACH reading) as shown in
Bits 4-3 - EDGES[1:0] - determines the minimum number of edges that must be detected on the
TACHx signal to determine a single rotation. A typical fan measured 5 edges (for a 2-pole fan). For
more accurate tachometer measurement, the minimum number of edges measured may be increased.
Increasing the number of edges measured with respect to the number of poles of the fan will cause
the TACH Reading registers to indicate a fan speed that is higher or lower than the actual speed. In
order for the FSC Algorithm to operate correctly, the TACH Target must be updated by the user to
accommodate this shift. The Effective Tach Multiplier shown in
Fan Configuration 1 Registers
1
0
0
1
1
‘0’ - (default) the control circuitry is disabled and the fan driver output is determined by the Fan
Driver Setting Register.
‘1’ - the control circuitry is enabled and the Fan Driver output will be automatically updated to
maintain the programmed fan speed as indicated by the TACH Target Register.
Configuration
Configuration
6.32). When the LUT_LOCK bit is cleared, then setting this bit will enable the FSC without
REGISTER
RANGE[1:0]
Fan 1
Fan 2
1
1
Table 6.28 Fan Configuration 1 Registers
ALGO
ALGO
EN_
EN_
B7
Table 6.29 Range Decode
0
0
1
0
1
DATASHEET
RANGE[1:0]
RANGE[1:0]
B6
Table
65
B5
6.29.
REPORTED MINIMUM
EDGES[1:0]
EDGES[1:0]
B4
1000 (default)
B3
RPM
2000
4000
500
Table 6.30
B2
UPDATE[2:0]
UPDATE[2:0]
is used as a direct multiplier
B1
Revision 1.74 (05-08-08)
TACH COUNT
MULTIPLIER
B0
1
2
4
8
DEFAULT
2Bh
2Bh