zl50212 Zarlink Semiconductor, zl50212 Datasheet - Page 16

• Manufacturer Part Number: zl50212
• Description: 288 Channel Voice Echo Canceller
• Manufacturer: Zarlink Semiconductor

16
4.0
Each echo canceller has four functional states: Mute, Bypass, Disable Adaptation and Enable Adaptation.
4.1
In Normal and in Extended Delay configurations, writing a “1” into the MuteR bit replaces Rin with quiet code which
is applied to both the Adaptive Filter and Rout. Writing a “1” into the MuteS bit replaces the Sout PCM data with quiet
code.
In Back-to-Back configuration, writing a “1” into the MuteR bit of Echo Canceller A, Control Register 2, causes
quiet code to be transmitted on Rout. Writing a “1” into the MuteS bit of Echo Canceller A, Control Register 2,
causes quiet code to be transmitted on Sout.
In Extended Delay and in Back-to-Back configurations, MuteR and MuteS bits of Echo Canceller B must always be
“0”. Refer to Figure 4 and to Control Register 2 for bit description.
4.2
The Bypass state directly transfers PCM codes from Rin to Rout and from Sin to Sout. When Bypass state is
selected, the Adaptive Filter coefficients are reset to zero. Bypass state must be selected for at least one frame
(125 µs) in order to properly clear the filter.
4.3
When the Disable Adaptation state is selected, the Adaptive Filter coefficients are frozen at their current value. The
adaptation process is halted, however, the echo canceller continues to cancel echo.
4.4
In Enable Adaptation state, the Adaptive Filter coefficients are continually updated. This allows the echo canceller
to model the echo return path characteristics in order to cancel echo. This is the normal operating state.
The echo canceller functions are selected in Control Register 1 and Control Register 2 through four control bits:
MuteS, MuteR, Bypass and AdaptDis. Refer to the EVP Registers Description for details.
ZL50212
Echo Canceller Functional States
Mute
Bypass
Disable Adaptation
Enable Adaptation
(quiet code)
+Zero
Table 2 - Quiet PCM Code Assignment
complement
LINEAR
0000
16 bits
2’s
Zarlink Semiconductor Inc.
hex
MAGNITUDE
µ
A-Law
SIGN/
80
-Law
hex
µ
FF
-Law
hex
CCITT (G.711)
A-Law
D5
hex
Data Sheet