zl50051gag2 Zarlink Semiconductor, zl50051gag2 Datasheet - Page 32
zl50051gag2
Manufacturer Part Number
zl50051gag2
Description
8 K Channel Digital Switch With High Jitter Tolerance, Single Rate 8 Or 16 Mbps And 64 Input And 64 Output Streams
Manufacturer
Zarlink Semiconductor
Datasheet
1.ZL50051GAG2.pdf
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10.2.2
10.2.2.1
The Boundary-Scan register consists of a series of Boundary-Scan cells arranged to form a scan path around the
boundary of the ZL50051/3 core logic.
10.2.2.2
The Bypass register is a single stage shift register to provide a 1 bit path from TDi to TDo.
10.2.2.3
The JTAG device ID for the ZL50051/3 is 0C38314B
Version, Bits <31:28>: 0000
Part No., Bits <27:12>: 1100 0011 1000 0011
Manufacturer ID, Bits <11:1>: 0001 0100 101
Header, Bit <0> (LSB): 1
10.3
A Boundary Scan Description Language (BSDL) file is available from Zarlink Semiconductor to aid in the use of the
IEEE 1149.1 test interface.
11.0
When the most significant bit, A14, of the address bus is set to ’1’, the microprocessor performs an access to one of
the device’s internal memories. The Control Register bits MS[2:0] indicate which memory (Local Connection, Local
Data, Backplane Connection, or Backplane Data) is being accessed. Address bits A0-A13 indicate which location
within the particular memory is being accessed.
The device contains two data memory blocks, one for received Backplane data and one for received Local data. For
all data rates, the received data is converted to parallel format by internal serial-to-parallel converters and stored
sequentially in the relevant data memory.
Address Bit
A13-A9
A8-A0
A14
Boundary Scan Description Language (BSDL) File
Memory Address Mappings
Test Data Registers
The Device Identification Register
The Boundary-Scan Register
The Bypass Register
Table 7 - Address Map for Data and Connection Memory Locations (A14 = 1)
Selects memory or register access (0 = register, 1 = memory)
Note that which memory (Local Connection, Local Data, Backplane Connection, Backplane
Data) is accessed depends on the MS[2:0] bits in the Control Register.
Stream address (0 - 31)
Streams 0 to 31 are used when serial stream is at 8.192 Mbps
Streams 0 to 15 are used when serial stream is at 16.384 Mbps
Channel address (0 - 511)
Channels 0 to 127 are used when serial stream is at 8.192 Mbps
Channels 0 to 255 are used when serial stream is at 16.384 Mbps
Zarlink Semiconductor Inc.
ZL50051/3
H
.
32
Description
Data Sheet
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