mt9079apr1 Zarlink Semiconductor, mt9079apr1 Datasheet - Page 12

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mt9079apr1

Manufacturer Part Number
mt9079apr1
Description
Advanced Controller For E1
Manufacturer
Zarlink Semiconductor
Datasheet
Timeslot #
CCS = denotes Signalling Channel if Common Channel Signalling Mode Selected
x = Unused Channel
TAIS Operation
The TAIS (Transmit AIS) pin allows the PRI interface to transmit an all ones signal form the point of power-up
without writing to any control registers. After the interface has been initialized normal operation can take place by
making TAIS high.
National Bit Buffers
Table 4 shows the contents of the transmit and receive Frame Alignment Signals (FAS) and Non-frame Alignment
Signals (NFAS) of time slot zero of a PCM 30 signal. Even numbered frames (CRC Frame # 0, 2, 4, ...) are FASs
and odd numbered frames (CRC Frame # 1, 3, 5, ...) are NFASs. The bits of each channel are numbered 1 to 8,
with 1 being the most significant and 8 the least significant.
Timeslot #
CSTo1/CSTi2
Basic Frame
PCM 30
Timeslot 16
for channel
DSTi #
PCM 30
DSTo
PCM 30
Figure 4a - Relationship between Input DSTi Channels and Transmitted PCM 30 Timeslots
Figure 4b - Relationship between Received PCM 30 Timeslots and Output DSTo Channels
0
0 1
0 1
Figure 4c - Relationship between PCM 30 Frames, Channels and CSTo1 Channels
1
1
X
0
0
2
2
2
2
1
1
1
3
3
2
2
2
3
3
4
4
3
3
3
4
4
5
5
5
5
4
4
4
6
6
6
6
5
5
5
7
7
7
7
6
6
6
8
8
8
8
7
7
7
9 10 11 12 13 14 15
9 10 11 12 13 14 15
9 10 11 12 13 14 15
9 10 11 12 13 14 15 SIG 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
8
8
8
9
9
9
10
10
10
Zarlink Semiconductor Inc.
11
11
11
MT9079
12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
12
12
12
13
13
CSS
16
14
14
16
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
15
15
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
0
X
16
1
17
2
18
3
19
4
20
5
21
6
22
7
23
8
24
9
10
25
Data Sheet
26
11
12
27
13
28
14
29
15
30

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