mt91l61asr1 Zarlink Semiconductor, mt91l61asr1 Datasheet - Page 8

• Manufacturer Part Number: mt91l61asr1
• Description: 3 V Multi-featured Phone Codec With Programmable U/a Law Companding
• Manufacturer: Zarlink Semiconductor

3) The falling edge of CS indicates that a COMMAND/ADDRESS byte will be transmitted from the microprocessor. The
3) The falling edge of CS indicates that a COMMAND/ADDRESS byte will be transmitted from the microprocessor. The
1) Delays due to internal processor timing which are transparent.
2) The MT91L60/L61:latches received data on the rising edge of SCLK.
4) A new COMMAND/ADDRESS byte may be loaded only by CS cycling high then low again.
5) The COMMAND/ADDRESS byte contains:
1) Delays due to internal processor timing which are transparent.
4) A new COMMAND/ADDRESS byte may be loaded only by CS cycling high then low again.
5) The COMMAND/ADDRESS byte contains:
2) The MT91L60/L61: latches received data on the rising edge of SCLK.
DATA 1
RECEIVE
DATA 1
TRANSMIT
SCLK
CS
DATA 2
RECEIVE
DATA 1
TRANSMIT
SCLK
CS
subsequent byte is always data until terminated via CS returning high.
subsequent byte is always data until terminated via CS returning high.
2)
2)
3)
3)
D
D
0
7
D
D
Figure 5 - Serial Port Relative Timing for Motorola Mode 00/National Microwire
COMMAND/ADDRESS
1
COMMAND/ADDRESS
6
D
D
-outputs transmit data on the falling edge of SCLK.
2
5
-outputs transmit data on the falling edge of SCLK.
D
D
3
4
D
D
3
4
D
D
2
5
D
D
1
6
5)
5)
D
D
0
7
1 bit - Read/Write
3 bits - Addressing Data
4 bits - Unused
1 bit - Read/Write
3 bits - Addressing Data
4 bits - Unused
Figure 4 - Audio Gain Partitioning
1)
1)
D
D
D
D
7
0
7
Zarlink Semiconductor Inc.
0
MT91L60/61
D
D
D
D
6
1
6
1
DATA INPUT/OUTPUT
DATA INPUT/OUTPUT
D
D
D
D
5
2
5
2
D
D
D
D
8
4
3
4
3
D
D
D
D
3
4
3
4
D
D
D
D
2
5
2
5
D
D
D
D
1
6
1
6
D
R/W
X
7
D
D
D
D
D
7
0
7
0
7
4)
4)
3)
X
1)
1)
X
3)
D
D
D
D
7
0
7
0
X
X
4)
D
D
4)
D
D
6
1
6
1
COMMAND/ADDRESS:
COMMAND/ADDRESS:
D
D
D
D
X
X
5
2
5
2
D
D
D
D
4
3
A
4
3
A
2
D
D
2
D
D
3
4
3
4
A
D
D
D
D
A
1
2
5
2
5
1
D
D
Data Sheet
D
D
1
6
1
6
A
A
0
D
D
D
D
0
0
7
0
7
R/W
D
D
X
0
0