mt91l61asr1 Zarlink Semiconductor, mt91l61asr1 Datasheet - Page 17

• Manufacturer Part Number: mt91l61asr1
• Description: 3 V Multi-featured Phone Codec With Programmable U/a Law Companding
• Manufacturer: Zarlink Semiconductor

Note: Bits marked "-" are reserved bits and should be written with logic "0"
Path Control
Control Register 1
DrGain
PDFDI
PDDR
Rst
TxMute
RxMute
TxBsel
RxBsel
PDFDI PDDR
-
When high, the receive path is summed with the side tone path and is attenuated by 6dB.
When low, the receive path contains no side tone (default).
When high the received PCM stream is interrupted and replaced with quiet code; thus forcing the receive path into a mute state.
When high, the FDI PLA and the Filter/Codec are powered down (default). When low, the FDI is active.
When high, the ear driver and Filter/Codec are powered down (default). In addition, in ST-BUS mode, the selected output channel
When high, a software reset occurs performing the same function as the hardware reset (PWRST) except that the Rst bit remains
When high the transmit PCM stream is interrupted and replaced with quiet code; thus forcing the output code into a mute state
When high, the transmit B2 channel is functional in ST-BUS mode. When low, the transmit B1 channel is functional in ST-BUS
When high, the receive B2 channel is functional in ST-BUS mode. When low, the receive B1 channel is functional in ST-BUS
is tri-stated. In SSI mode the PCM output code will be -zero code during the valid strobe period. The output will be tri-stated
outside of the valid strobe and for the whole frame if no strobe is supplied. When low, the driver and Filter/Codec are active if
PDFDI is low.
high and device remains powered up. A software reset can be removed only by writing this bit low or by means of a hardware reset
(PWRST). This bit is useful for quickly programming the Registers to the default Power Reset Values. When this bit is low, the
reset condition is removed allowing the registers to be modified
(only the output code is muted, the transmit microphone and transmit Filter/Codec are still functional). When low the full transmit
path functions normally (default).
When low the full receive path functions normally (default).
mode. Not used in SSI mode.
7
7
-
6
6
Rst
-
5
5
-
_
4
4
Zarlink Semiconductor Inc.
TxMute RxMute
MT91L60/61
-
3
3
17
-
2
2
TxBsel RxBsel
1
1
-
DrGain
ADDRESS = 02h WRITE/READ VERIFY
ADDRESS = 03h WRITE/READ VERIFY
0
0
Power Reset Value
Power Reset Value
XX00 0000
0000 0000
Data Sheet