mt91l61asr1 Zarlink Semiconductor, mt91l61asr1 Datasheet - Page 4

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mt91l61asr1

Manufacturer Part Number
mt91l61asr1
Description
3 V Multi-featured Phone Codec With Programmable U/a Law Companding
Manufacturer
Zarlink Semiconductor
Datasheet

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MT91L61ASR1
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Overview
The 3 V Multi-featured Codec (MFC) features complete Analog/Digital and Digital/Analog conversion of audio signals
(Filter/Codec) and an analog interface to a standard handset transmitter and receiver (Transducer Interface). The receiver
amplifier is capable of driving a 300 ohm load.
Each of the programmable parameters within the functional blocks is accessed through a serial microcontroller port
compatible with Intel MCS-51
parameters include: gain control, power down, mute, B-Channel select (ST-BUS mode), C&D channel
control/access, law control, digital interface programming and loopback. Optionally the device may be used in a
controllerless mode utilizing the power-on default settings.
Pin Description (continued)
20 Pin24 Pin
12
13
14
15
16
17
18
19
20
Pin #
16,21
3,9,
14
15
16
17
18
19
20
22
23
24
CLOCKin Clock (Input). The clock provided to this input pin is used for the internal device
(MT91L6
HSPKR+ Non-Inverting Handset Speaker (Output). Output to the handset speaker
STBd/F0
HSPKR- Inverting Handset Speaker (Output). Output to the handset speaker (balanced).
STB/F0i Data Strobe/Frame Pulse (Input). For SSI mode this input determines the 8 bit
1 only)
Name
V
V
M+
NC
D
M-
od
SSA
DD
in
Data Input. A digital input for 8 bit wide channel data received from the Layer 1
transceiver. Data is sampled on the falling edge of the bit clock during the timeslot
defined by STB, or according to standard ST-BUS timing. Input level is CMOS
compatible.
timeslot used by the device for both transmit and receive data. This active high
signal has a repetition rate of 8 kHz. Standard frame pulse definitions apply in ST-
BUS mode. CMOS level compatible input.
Delayed Frame Pulse Output. In SSI mode, an 8 bit wide strobe is output after the
first strobe goes low. In ST-BUS mode, a frame pulse is output after 4 channel
timeslots.
functions. For SSI mode connect the bit clock to this pin when it is 512 kHz or
greater. Connect a 4096 kHz clock to this input when the available bit clock is
128 kHz or 256 kHz. For ST-BUS mode connect C4i to this pin. CMOS level
compatible.
Positive Power Supply (Input). Nominally 3 volts.
(balanced).
Analog Ground (Input). Nominally 0 volts.
Inverting Microphone (Input). Inverting input to microphone amplifier from the
handset microphone.
Non-Inverting Microphone (Input). Non-inverting input to microphone amplifier
from the handset microphone.
No Connect. (24 Packages only). Pin 16 is NC for MT91L60.
®
, Motorola SPI
Zarlink Semiconductor Inc.
®
MT91L60/61
and National Semiconductor Microwire
4
Description
®
specifications. These
Data Sheet

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