ml87v21071 Oki Semiconductor, ml87v21071 Datasheet - Page 76

• Manufacturer Part Number: ml87v21071
• Description: Video Signal Noise Reduction Ic With A Built-in Frame Memory
• Manufacturer: Oki Semiconductor

2. Description of the Registers
2.1 Mode Setting
OKI Semiconductor
SUB_ADDRESS = 40h (W/R): Write/read common mode setting
Register name
DATA_BIT
VMD[1:0] Initial value: 00; Setting range: 00 to 11
HMD[1:0] Initial value: 00; Setting range: 00 to 11
Sets vertical lines operation mode.
In normal operation, 2 and 3 are not set.
VMD[0] is validated when IRMON = 1.
Sets horizontal effective pixels (sampling frequency) mode.
In normal operation, 3 is not set.
HMD[0] is validated at IRMON = 1.
[1]
0
0
1
1
IRMON
HMD
BIT7
[0]
0
1
0
1
Table R2-1 (1) Vertical Line Operation Mode Setting
Table R2-1 (2) Horizontal Valid Pixel Mode Setting
R601
BIT6
[1]
Horizontal valid pixels mode setting
0
0
1
1
VMD
Square (768/640) pixel mode
[0]
(Reserved) (Reserved)
0
1
0
1
720-pixel mode
768-pixel mode
BIT5
Test mode
Vertical line operation mode setting
BIT4
625-line mode
525-line mode
Test mode
BIT3
1
HMD
14.75/12.272727 MHz
14.75/14.31818 MHz
Sampling frequency
BIT2
0
13.5 MHz
—
BIT1
1
VMD
PEDL87V21071-01
BIT0
ML87V21071
0
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