ml87v21071 Oki Semiconductor, ml87v21071 Datasheet - Page 19

• Manufacturer Part Number: ml87v21071
• Description: Video Signal Noise Reduction Ic With A Built-in Frame Memory
• Manufacturer: Oki Semiconductor

1.1.4 Input System Sync. Signal Polarity Inversion Setting
OKI Semiconductor
Negative polarity IVS can also be supported by setting the I
Moreover, with regard to field detection, setting is possible even when setting the internal IVR generation edge.
Negative polarity IHS can also be supported by setting the I
Figure F1-1-4 (2) Support of Input System Horizontal Sync. Signal Polarity Inversion
Figure F1-1-4 (1) Support of Input System Vertical Sync. Signal Polarity Inversion
IVSINV=0
IHSINV=0
IWE
IWE
IVS
IHS
IVSINV
0
1
Positive (default)
Negative
NPHWE[7:0]
Value set by
Recommended input IVS polarity
Table F1-1-4 (2) IHSINV Setting
IHSINV
Table F1-1-4 (1) IVINV Setting
NPVWE[3:0]
Value set by
0
1
Positive (default)
Negative
Input IHS polarity
2
IVSINV=1
C-bus setting register IHSINV (SUB:42h-bit[1]).
IWE
2
IVS
IHSINV=1
IWE
C-bus setting register IVSINV (SUB:42h-bit[0]).
IHS
Rising edge
Falling edge
IVR generation edge
NPHWE[7:0]
Value set by
NPVWE[3:0]
Value set by
PEDL87V21071-01
ML87V21071
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